| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 1230 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1295 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1299 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 1241 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1306 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1310 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 1295 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1360 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1364 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 1241 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1306 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1310 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_hdmi.c | 1302 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1367 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1371 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_hdmi.c | 1295 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1360 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1364 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_hdmi.c | 1233 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1298 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1302 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_hdmi.c | 1233 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1298 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1302 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 1395 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1460 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1464 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_hdmi.c | 1233 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1298 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1302 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 1395 … W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, (TMDS_COARSE_TUNE_20_START << 8)| BIT(3), BMASK(13:8)| BIT(3)); in _Hal_tmds_AutoEQInitialSetting()
1460 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
1464 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _Hal_tmds_AutoEQFunctionTrigger()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/ |
| H A D | halMHL.c | 2383 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _mhal_mhl_MHL3AutoEQTrigger()
2387 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _mhal_mhl_MHL3AutoEQTrigger()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/ |
| H A D | halMHL.c | 2383 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _mhal_mhl_MHL3AutoEQTrigger()
2387 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _mhal_mhl_MHL3AutoEQTrigger()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/ |
| H A D | halMHL.c | 2383 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _mhal_mhl_MHL3AutoEQTrigger()
2387 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _mhal_mhl_MHL3AutoEQTrigger()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/ |
| H A D | halMHL.c | 2383 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _mhal_mhl_MHL3AutoEQTrigger()
2387 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _mhal_mhl_MHL3AutoEQTrigger()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/ |
| H A D | halMHL.c | 2383 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, BIT(2), BIT(2)); in _mhal_mhl_MHL3AutoEQTrigger()
2387 W2BYTEMSK(REG_COMBO_PHY0_P1_33_L, 0, BIT(2)); in _mhal_mhl_MHL3AutoEQTrigger()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 2115 #define REG_COMBO_PHY0_P1_33_L (REG_COMBO_PHY0_P1_BASE + 0x66) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 2117 #define REG_COMBO_PHY0_P1_33_L (REG_COMBO_PHY0_P1_BASE + 0x66) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 2115 #define REG_COMBO_PHY0_P1_33_L (REG_COMBO_PHY0_P1_BASE + 0x66) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 2117 #define REG_COMBO_PHY0_P1_33_L (REG_COMBO_PHY0_P1_BASE + 0x66) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 2115 #define REG_COMBO_PHY0_P1_33_L (REG_COMBO_PHY0_P1_BASE + 0x66) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 2117 #define REG_COMBO_PHY0_P1_33_L (REG_COMBO_PHY0_P1_BASE + 0x66) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 2117 #define REG_COMBO_PHY0_P1_33_L (REG_COMBO_PHY0_P1_BASE + 0x66) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 2115 #define REG_COMBO_PHY0_P1_33_L (REG_COMBO_PHY0_P1_BASE + 0x66) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_hdmi.h | 2116 #define REG_COMBO_PHY0_P1_33_L (REG_COMBO_PHY0_P1_BASE + 0x66) macro
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