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Searched refs:REG_COMBO_PHY0_P0_5B_L (Results 1 – 25 of 44) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_mux.c340 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
341 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
342 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
343 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
374 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
375 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
376 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
377 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
408 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
409 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
[all …]
H A Dmhal_hdmi.c530 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4689 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4754 …W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000, 0x1000); // [12]: power on clock amplif… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_mux.c328 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
351 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
374 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
397 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
420 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_mux.c340 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
374 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
408 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
442 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
475 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c527 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4013 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4078 …W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000, 0x1000); // [12]: power on clock amplif… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_mux.c328 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
352 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
376 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
400 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
424 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_mux.c340 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
374 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
408 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
442 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
475 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c530 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4695 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4760 …W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000, 0x1000); // [12]: power on clock amplif… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_mux.c340 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
374 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
408 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
442 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
475 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c530 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4692 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4757 …W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000, 0x1000); // [12]: power on clock amplif… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_mux.c340 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
374 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
408 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
442 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
475 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c665 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4249 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4314 …W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000, 0x1000); // [12]: power on clock amplif… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_mux.c340 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
374 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
408 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
442 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
475 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c665 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4249 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4314 …W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000, 0x1000); // [12]: power on clock amplif… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_mux.c340 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x0000, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
374 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
408 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
442 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
475 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0x2FFF, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c599 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4058 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4123 …W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000, 0x1000); // [12]: power on clock amplif… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c295 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0)); in _mhal_mhl_HdmiBypassModeSetting()
315 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0)); in _mhal_mhl_HdmiBypassModeSetting()
375 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0, BIT(13)| BMASK(3:0)); in _mhal_mhl_Mhl24bitsModeSetting()
395 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0, BIT(13)| BMASK(3:0)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c295 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0)); in _mhal_mhl_HdmiBypassModeSetting()
315 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0)); in _mhal_mhl_HdmiBypassModeSetting()
375 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0, BIT(13)| BMASK(3:0)); in _mhal_mhl_Mhl24bitsModeSetting()
395 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0, BIT(13)| BMASK(3:0)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c411 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0)); in _mhal_mhl_HdmiBypassModeSetting()
517 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0, BIT(13)| BMASK(3:0)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c411 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0)); in _mhal_mhl_HdmiBypassModeSetting()
525 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0, BIT(13)| BMASK(3:0)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c535 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4118 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4187 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c606 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4127 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4192 …W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000, 0x1000); // [12]: power on clock amplif… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c535 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4118 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4187 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c606 … W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, bPowerOn? 0: (BIT(13)| BMASK(3:0)), BIT(13)| BMASK(3:0)); in _Hal_tmds_PowerDownControl()
4127 W2BYTE(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000); in Hal_HDMI_init()
4192 …W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L + u16bank_offset, 0x0000, 0x1000); // [12]: power on clock amplif… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c412 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0)); in _mhal_mhl_HdmiBypassModeSetting()
532 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0, BIT(13)| BMASK(3:0)); in _mhal_mhl_Mhl24bitsModeSetting()

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