| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_hdmi.c | 334 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
335 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
2661 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_hdmi.c | 414 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
415 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
3398 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 563 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
564 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5020 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 571 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
572 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5120 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 642 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
643 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5158 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 571 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
572 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5120 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_hdmi.c | 635 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
636 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5131 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_hdmi.c | 642 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
643 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5158 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_hdmi.c | 566 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
567 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5723 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_hdmi.c | 566 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
567 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5726 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 701 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
702 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5429 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_hdmi.c | 566 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
567 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5729 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 701 W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, 0, BIT(12)| BIT(8)| BIT(4)| BIT(0)); in _Hal_tmds_ResetClockDetect()
702 …W2BYTEMSK(REG_COMBO_PHY0_P0_32_L, BIT(12)| BIT(8)| BIT(4)| BIT(0), BIT(12)| BIT(8)| BIT(4)| BIT(0)… in _Hal_tmds_ResetClockDetect()
5429 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 1597 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 1599 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 1597 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 1599 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 1597 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 1599 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 1599 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 1597 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_hdmi.h | 1598 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_hdmi.h | 1597 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_hdmi.h | 1597 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_hdmi.h | 1597 #define REG_COMBO_PHY0_P0_32_L (REG_COMBO_PHY0_P0_BASE + 0x64) macro
|