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Searched refs:REG_COMBO_PHY0_P0_0C_L (Results 1 – 25 of 35) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_mux.c322 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
345 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
368 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
391 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
414 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c1890 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_mux.c325 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
359 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
393 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
427 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
460 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c4007 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4075 …W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x1008);// enable [19]: lock detect, [28]: XTAL cl… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_mux.c322 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
346 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
370 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
394 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
418 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c2625 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_mux.c325 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
359 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
393 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
427 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
460 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c4689 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4757 …W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x1008);// enable [19]: lock detect, [28]: XTAL cl… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_mux.c325 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
359 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
393 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
427 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
460 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c4686 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4754 …W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x1008);// enable [19]: lock detect, [28]: XTAL cl… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_mux.c325 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
359 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
393 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
427 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
460 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c4243 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4311 …W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x1008);// enable [19]: lock detect, [28]: XTAL cl… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_mux.c325 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
359 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
393 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
427 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
460 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c4243 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4311 …W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x1008);// enable [19]: lock detect, [28]: XTAL cl… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_mux.c325 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
359 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
393 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
427 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
460 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c4683 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4751 …W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x1008);// enable [19]: lock detect, [28]: XTAL cl… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_mux.c325 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x3FFF); in Hal_SC_mux_set_dvi_mux()
359 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
393 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
427 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
460 W2BYTE(REG_COMBO_PHY0_P0_0C_L, 0x1008); in Hal_SC_mux_set_dvi_mux()
H A Dmhal_hdmi.c4052 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4120 …W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x1008);// enable [19]: lock detect, [28]: XTAL cl… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c4112 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4181 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c4121 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4189 …W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x1008);// enable [19]: lock detect, [28]: XTAL cl… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c4112 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4181 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c4121 W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x3FFF); in Hal_HDMI_init()
4189 …W2BYTE(REG_COMBO_PHY0_P0_0C_L + u16bank_offset, 0x1008);// enable [19]: lock detect, [28]: XTAL cl… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1521 #define REG_COMBO_PHY0_P0_0C_L (REG_COMBO_PHY0_P0_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1523 #define REG_COMBO_PHY0_P0_0C_L (REG_COMBO_PHY0_P0_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1521 #define REG_COMBO_PHY0_P0_0C_L (REG_COMBO_PHY0_P0_BASE + 0x18) macro

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