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Searched refs:REG_CKG_IDCLK_USR_ENA (Results 1 – 9 of 9) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h856 #define REG_CKG_IDCLK_USR_ENA (REG_CLKGEN0_BASE + 0xB4 ) // idclk user enable macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h816 #define REG_CKG_IDCLK_USR_ENA (REG_CLKGEN0_BASE + 0xB4 ) // idclk user enable macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h868 #define REG_CKG_IDCLK_USR_ENA (REG_CLKGEN0_BASE + 0xB4 ) // idclk user enable macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h873 #define REG_CKG_IDCLK_USR_ENA (REG_CLKGEN0_BASE + 0xB4 ) // idclk user enable macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h860 #define REG_CKG_IDCLK_USR_ENA (REG_CLKGEN0_BASE + 0xB4 ) // idclk user enable macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_dip.c1967 u16clk_usr_enable = MDrv_DIP_Read2Byte(REG_CKG_IDCLK_USR_ENA) &CKG_IDCLK3_USR_ENA; in HAL_XC_DIP_MuxDispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_dip.c1933 u16clk_usr_enable = MDrv_DIP_Read2Byte(REG_CKG_IDCLK_USR_ENA) &CKG_IDCLK3_USR_ENA; in HAL_XC_DIP_MuxDispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_dip.c1968 u16clk_usr_enable = MDrv_DIP_Read2Byte(REG_CKG_IDCLK_USR_ENA) &CKG_IDCLK3_USR_ENA; in HAL_XC_DIP_MuxDispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_dip.c1933 u16clk_usr_enable = MDrv_DIP_Read2Byte(REG_CKG_IDCLK_USR_ENA) &CKG_IDCLK3_USR_ENA; in HAL_XC_DIP_MuxDispatch()