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Searched refs:RASP1_BANK1_REG_CTRL_BASE (Results 1 – 5 of 5) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregNDSRASP.h426 #define RASP1_BANK1_REG_CTRL_BASE (0x23C00) //0x11E<<9 //bank 0x111E macro
429 #define RASP1_BANK1_EVENT_MASK_BASE (RASP1_BANK1_REG_CTRL_BASE+0x180)
430 #define RASP1_BANK1_PAYLOAD_MASK_BASE (RASP1_BANK1_REG_CTRL_BASE+0x100)
431 #define RASP1_BANK1_ECM_PIDFLT_BASE (RASP1_BANK1_REG_CTRL_BASE+0x48)
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregNDSRASP.h426 #define RASP1_BANK1_REG_CTRL_BASE (0x23C00) //0x11E<<9 //bank 0x111E macro
429 #define RASP1_BANK1_EVENT_MASK_BASE (RASP1_BANK1_REG_CTRL_BASE+0x180)
430 #define RASP1_BANK1_PAYLOAD_MASK_BASE (RASP1_BANK1_REG_CTRL_BASE+0x100)
431 #define RASP1_BANK1_ECM_PIDFLT_BASE (RASP1_BANK1_REG_CTRL_BASE+0x48)
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregNDSRASP.h426 #define RASP1_BANK1_REG_CTRL_BASE (0x23C00) //0x11E<<9 //bank 0x111E macro
429 #define RASP1_BANK1_EVENT_MASK_BASE (RASP1_BANK1_REG_CTRL_BASE+0x180)
430 #define RASP1_BANK1_PAYLOAD_MASK_BASE (RASP1_BANK1_REG_CTRL_BASE+0x100)
431 #define RASP1_BANK1_ECM_PIDFLT_BASE (RASP1_BANK1_REG_CTRL_BASE+0x48)
/utopia/UTPA2-700.0.x/modules/dscmb/hal/curry/nsk2/
H A DregNDSRASP.h426 #define RASP1_BANK1_REG_CTRL_BASE (0x23C00) //0x11E<<9 //bank 0x111E macro
429 #define RASP1_BANK1_EVENT_MASK_BASE (RASP1_BANK1_REG_CTRL_BASE+0x180)
430 #define RASP1_BANK1_PAYLOAD_MASK_BASE (RASP1_BANK1_REG_CTRL_BASE+0x100)
431 #define RASP1_BANK1_ECM_PIDFLT_BASE (RASP1_BANK1_REG_CTRL_BASE+0x48)
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregNDSRASP.h426 #define RASP1_BANK1_REG_CTRL_BASE (0x23C00) //0x11E<<9 //bank 0x111E macro
429 #define RASP1_BANK1_EVENT_MASK_BASE (RASP1_BANK1_REG_CTRL_BASE+0x180)
430 #define RASP1_BANK1_PAYLOAD_MASK_BASE (RASP1_BANK1_REG_CTRL_BASE+0x100)
431 #define RASP1_BANK1_ECM_PIDFLT_BASE (RASP1_BANK1_REG_CTRL_BASE+0x48)