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Searched refs:PHASE_OFFSET_LIMIT_FREQ_ONLY (Results 1 – 9 of 9) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dmhal_xc_chip_config.h121 #define PHASE_OFFSET_LIMIT_FREQ_ONLY (0x2000UL) //0x03DFUL // 0x8000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dmhal_xc_chip_config.h121 #define PHASE_OFFSET_LIMIT_FREQ_ONLY (0x2000UL) //0x03DFUL // 0x8000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h121 #define PHASE_OFFSET_LIMIT_FREQ_ONLY (0x1200UL) //0x03DFUL // 0x8000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h121 #define PHASE_OFFSET_LIMIT_FREQ_ONLY (0x2000UL) //0x03DFUL // 0x8000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h121 #define PHASE_OFFSET_LIMIT_FREQ_ONLY (0x2000UL) //0x03DFUL // 0x8000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h121 #define PHASE_OFFSET_LIMIT_FREQ_ONLY (0x2000UL) //0x03DFUL // 0x8000UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h122 #define PHASE_OFFSET_LIMIT_FREQ_ONLY (0x1200UL) //0x03DFUL // 0x8000UL macro
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_display.c4048 MDrv_Write2Byte(L_BK_LPLL(0x0A), PHASE_OFFSET_LIMIT_FREQ_ONLY); in _MApi_XC_FPLL_EnableLcokFreqOnly()
4183 MDrv_Write2Byte(L_BK_LPLL(0x0A), PHASE_OFFSET_LIMIT_FREQ_ONLY); in MDrv_XC_FPLL_IsSupportLockFreqOnly()
4844 MDrv_Write2Byte(L_BK_LPLL(0x0A), PHASE_OFFSET_LIMIT_FREQ_ONLY); in _MApi_XC_FPLL_FSM_ISR()
H A Dmdrv_sc_display.c.04046 MDrv_Write2Byte(L_BK_LPLL(0x0A), PHASE_OFFSET_LIMIT_FREQ_ONLY);
4181 MDrv_Write2Byte(L_BK_LPLL(0x0A), PHASE_OFFSET_LIMIT_FREQ_ONLY);
4842 MDrv_Write2Byte(L_BK_LPLL(0x0A), PHASE_OFFSET_LIMIT_FREQ_ONLY);