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Searched refs:MVD_CTRL (Results 1 – 25 of 81) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/mvd/
H A DhalMVD.c505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
926 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE); in HAL_MVD_SetSyncClk()
1171 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT); in HAL_MVD_ClearIRQ()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/mvd/
H A DhalMVD.c505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
926 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE); in HAL_MVD_SetSyncClk()
1171 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT); in HAL_MVD_ClearIRQ()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/mvd/
H A DhalMVD.c505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
926 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE); in HAL_MVD_SetSyncClk()
1171 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT); in HAL_MVD_ClearIRQ()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/mainz/mvd/
H A DhalMVD.c505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
926 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE); in HAL_MVD_SetSyncClk()
1171 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT); in HAL_MVD_ClearIRQ()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/mvd/
H A DhalMVD.c505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
926 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE); in HAL_MVD_SetSyncClk()
1171 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT); in HAL_MVD_ClearIRQ()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/messi/mvd/
H A DhalMVD.c505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
926 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE); in HAL_MVD_SetSyncClk()
1171 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT); in HAL_MVD_ClearIRQ()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/mvd/
H A DhalMVD.c505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
926 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE); in HAL_MVD_SetSyncClk()
1171 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT); in HAL_MVD_ClearIRQ()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/mvd/
H A DhalMVD.c505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
926 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE); in HAL_MVD_SetSyncClk()
1171 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT); in HAL_MVD_ClearIRQ()
/utopia/UTPA2-700.0.x/modules/pws/hal/maxim/pws/
H A DregPWS.h147 #define MVD_CTRL (0x1100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/M7621/pws/
H A DregPWS.h147 #define MVD_CTRL (0x1100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/macan/pws/
H A DregPWS.h147 #define MVD_CTRL (0x1100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/mustang/pws/
H A DregPWS.h132 #define MVD_CTRL (0x1100) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/messi/pws/
H A DregPWS.h132 #define MVD_CTRL (0x1100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/maserati/pws/
H A DregPWS.h147 #define MVD_CTRL (0x1100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/mooney/pws/
H A DregPWS.h132 #define MVD_CTRL (0x1100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/mainz/pws/
H A DregPWS.h132 #define MVD_CTRL (0x1100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/M7821/pws/
H A DregPWS.h147 #define MVD_CTRL (0x1100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/manhattan/pws/
H A DregPWS.h147 #define MVD_CTRL (0x1100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/maldives/pws/
H A DregPWS.h132 #define MVD_CTRL (0x1100) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/kano/pws/
H A DregPWS.h147 #define MVD_CTRL (0x1100) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/curry/pws/
H A DregPWS.h147 #define MVD_CTRL (0x1100) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/k6lite/pws/
H A DregPWS.h147 #define MVD_CTRL (0x1100) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/k6/pws/
H A DregPWS.h147 #define MVD_CTRL (0x1100) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/mvd_v3/
H A DregMVD_EX.h154 #define MVD_CTRL (MVD_REG_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/mvd_v3/
H A DregMVD_EX.h159 #define MVD_CTRL (MVD_REG_BASE + 0x00) macro

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