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Searched refs:HVD_BBU_DRAM_ST_ADDR (Results 1 – 25 of 29) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/hvd_ex/
H A DfwHVD_if.h252 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
257 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
273 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
274 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
347 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
352 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
358 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
359 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/hvd_ex/
H A DfwHVD_if.h252 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
257 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
273 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
274 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
347 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
352 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
358 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
359 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/hvd_ex/
H A DfwHVD_if.h252 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
257 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
273 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
274 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
347 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
352 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
358 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
359 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/hvd_ex/
H A DfwHVD_if.h252 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
257 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
273 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
274 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
347 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
352 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
358 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
359 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/hvd_ex/
H A DfwHVD_if.h252 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
257 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
273 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
274 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
347 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
352 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
358 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
359 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/hvd_ex/
H A DfwHVD_if.h252 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
257 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
273 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
274 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
347 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
352 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
358 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
359 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/hvd_ex/
H A DfwHVD_if.h252 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
257 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
273 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
274 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
347 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
352 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
358 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
359 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/hvd_ex/
H A DfwHVD_if.h252 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
257 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
273 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
274 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
347 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
352 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
358 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
359 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/hvd_ex/
H A DfwHVD_if.h252 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
257 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
273 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
274 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
347 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
352 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
358 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
359 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/hvd_ex/
H A DfwHVD_if.h252 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
257 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
273 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
274 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
347 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
352 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
358 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
359 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DfwHVD_if.h301 #define HVD_BBU_DRAM_ST_ADDR 0xE8000 // bbu table from dram starting address macro
306 #define HVD_BBU2_DRAM_ST_ADDR (HVD_BBU_DRAM_ST_ADDR + 0x2000) //0xEA000 // bbu table …
322 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
323 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
397 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address
402 #define HVD_BBU2_DRAM_ST_ADDR HVD_BBU_DRAM_ST_ADDR + 0x2000 //0x7A000 // bbu table fr…
408 #define VP8_BBU_DRAM_ST_ADDR_BS3 HVD_BBU_DRAM_ST_ADDR // bbu table from dram starting add…
409 #define VP8_BBU_DRAM_ST_ADDR_BS4 (HVD_BBU_DRAM_ST_ADDR + 0x2000) // bbu table from dram st…
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/hvd/
H A DhalHVD_sub.c691 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_Sub_SetBufferAddr()
1203 …addr = gSubHVDCtrl.MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<3); in _HAL_HVD_Sub_UpdateESWptr()
1206 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_Sub_UpdateESWptr()
2391 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2403 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2471 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_Sub_GetBBUEntry()
H A DhalHVD.c704 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_SetBufferAddr()
1260 …addr = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<… in _HAL_HVD_UpdateESWptr()
1263 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_UpdateESWptr()
2612 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2624 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2692 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_GetBBUEntry()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/hvd/
H A DhalHVD_sub.c691 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_Sub_SetBufferAddr()
1203 …addr = gSubHVDCtrl.MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<3); in _HAL_HVD_Sub_UpdateESWptr()
1206 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_Sub_UpdateESWptr()
2391 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2403 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2471 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_Sub_GetBBUEntry()
H A DhalHVD.c704 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_SetBufferAddr()
1260 …addr = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<… in _HAL_HVD_UpdateESWptr()
1263 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_UpdateESWptr()
2612 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2624 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2692 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_GetBBUEntry()
H A DfwHVD_if.h141 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/hvd/
H A DhalHVD_sub.c691 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_Sub_SetBufferAddr()
1203 …addr = gSubHVDCtrl.MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<3); in _HAL_HVD_Sub_UpdateESWptr()
1206 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_Sub_UpdateESWptr()
2391 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2403 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2471 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_Sub_GetBBUEntry()
H A DhalHVD.c704 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_SetBufferAddr()
1260 …addr = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<… in _HAL_HVD_UpdateESWptr()
1263 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_UpdateESWptr()
2612 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2624 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2692 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_GetBBUEntry()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/hvd/
H A DhalHVD_sub.c691 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_Sub_SetBufferAddr()
1203 …addr = gSubHVDCtrl.MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<3); in _HAL_HVD_Sub_UpdateESWptr()
1206 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_Sub_UpdateESWptr()
2391 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2403 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2471 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_Sub_GetBBUEntry()
H A DhalHVD.c704 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_SetBufferAddr()
1260 …addr = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<… in _HAL_HVD_UpdateESWptr()
1263 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_UpdateESWptr()
2612 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2624 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2692 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_GetBBUEntry()
H A DfwHVD_if.h141 #define HVD_BBU_DRAM_ST_ADDR 0x78000 // bbu table from dram starting address macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/hvd/
H A DhalHVD_sub.c691 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_Sub_SetBufferAddr()
1203 …addr = gSubHVDCtrl.MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<3); in _HAL_HVD_Sub_UpdateESWptr()
1206 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_Sub_UpdateESWptr()
2391 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2403 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2471 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_Sub_GetBBUEntry()
H A DhalHVD.c704 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_SetBufferAddr()
1260 …addr = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<… in _HAL_HVD_UpdateESWptr()
1263 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_UpdateESWptr()
2612 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2624 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2692 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_GetBBUEntry()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/hvd/
H A DhalHVD_sub.c691 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_Sub_SetBufferAddr()
1203 …addr = gSubHVDCtrl.MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<3); in _HAL_HVD_Sub_UpdateESWptr()
1206 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_Sub_UpdateESWptr()
2391 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2403 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_Sub_UpdateESWptr_Fire()
2471 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_Sub_GetBBUEntry()
H A DhalHVD.c704 HVD_BBU_DRAM_ST_ADDR; in _HAL_HVD_SetBufferAddr()
1260 …addr = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR + ((u32BBUWptr-(u32BBUWptr%2))<<… in _HAL_HVD_UpdateESWptr()
1263 addr = (pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32BBUWptr<<3); in _HAL_HVD_UpdateESWptr()
2612 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2624 u32SrcAdd = pHVDCtrl_Hal->MemMap.u32CodeBufVAddr + HVD_BBU_DRAM_ST_ADDR; in HAL_HVD_UpdateESWptr_Fire()
2692 addr = (MS_U8*)((pHVDCtrl_Hal->MemMap.u32CodeBufVAddr)+ HVD_BBU_DRAM_ST_ADDR + (u32Idx<<3)); in HAL_HVD_GetBBUEntry()

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