Home
last modified time | relevance | path

Searched refs:DDR_FREQ_DIV_1 (Results 1 – 7 of 7) sorted by relevance

/utopia/UTPA2-700.0.x/modules/miu/hal/maldives/miu/
H A DregMIU.h129 #define DDR_FREQ_DIV_1 (MIU_REG_BASE+0x25) //0x1225 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/manhattan/miu/
H A DregMIU.h134 #define DDR_FREQ_DIV_1 (MIU_REG_BASE+0x25) //0x1225 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/curry/miu/
H A DregMIU.h129 #define DDR_FREQ_DIV_1 (MIU_REG_BASE+0x25) //0x1225 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/kano/miu/
H A DregMIU.h129 #define DDR_FREQ_DIV_1 (MIU_REG_BASE+0x25) //0x1225 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/M7821/miu/
H A DregMIU.h137 #define DDR_FREQ_DIV_1 (MIU_REG_BASE+0x25) //0x1225 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/maserati/miu/
H A DregMIU.h137 #define DDR_FREQ_DIV_1 (MIU_REG_BASE+0x25) //0x1225 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/macan/miu/
H A DregMIU.h134 #define DDR_FREQ_DIV_1 (MIU_REG_BASE+0x25) //0x1225 macro