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Searched refs:CKG_S2_FICLK_F1_GATED (Results 1 – 9 of 9) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h790 #define CKG_S2_FICLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h772 #define CKG_S2_FICLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h836 #define CKG_S2_FICLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h950 #define CKG_S2_FICLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h905 #define CKG_S2_FICLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h962 #define CKG_S2_FICLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h899 #define CKG_S2_FICLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h967 #define CKG_S2_FICLK_F1_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h954 #define CKG_S2_FICLK_F1_GATED BIT(0) macro