Home
last modified time | relevance | path

Searched refs:BWTABLE (Results 1 – 25 of 26) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/include/
H A DQualityMap_BW.c184 tab_Info.pIPTable = (void*)BWTABLE; in _MDrv_BW_PushBuffer()
H A DManhattan_Bandwidth_RegTable.c168 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
H A DMaserati_Bandwidth_RegTable.c245 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/include/
H A DQualityMap_BW.c179 tab_Info.pIPTable = (void*)BWTABLE; in _MDrv_BW_PushBuffer()
H A DCurry_Bandwidth_RegTable.c160 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
H A DKano_Bandwidth_RegTable.c160 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/include/
H A DQualityMap_BW.c184 tab_Info.pIPTable = (void*)BWTABLE; in _MDrv_BW_PushBuffer()
H A DManhattan_Bandwidth_RegTable.c168 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
H A DMaserati_Bandwidth_RegTable.c247 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/include/
H A DQualityMap_BW.c184 tab_Info.pIPTable = (void*)BWTABLE; in _MDrv_BW_PushBuffer()
H A DManhattan_Bandwidth_RegTable.c168 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
H A DMaserati_Bandwidth_RegTable.c245 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/include/
H A DQualityMap_BW.c179 tab_Info.pIPTable = (void*)BWTABLE; in _MDrv_BW_PushBuffer()
H A DKano_Bandwidth_RegTable.c160 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A DQualityMap_BW.c181 tab_Info.pIPTable = (void*)BWTABLE; in _MDrv_BW_PushBuffer()
H A DMooney_Bandwidth_RegTable.c170 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/include/
H A DQualityMap_BW.c184 tab_Info.pIPTable = (void*)BWTABLE; in _MDrv_BW_PushBuffer()
H A DManhattan_Bandwidth_RegTable.c168 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/include/
H A DQualityMap_BW.c184 tab_Info.pIPTable = (void*)BWTABLE; in _MDrv_BW_PushBuffer()
H A DManhattan_Bandwidth_RegTable.c168 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
H A DMaserati_Bandwidth_RegTable.c245 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/include/
H A DQualityMap_BW.c179 tab_Info.pIPTable = (void*)BWTABLE; in _MDrv_BW_PushBuffer()
H A Dk6lite_Bandwidth_RegTable.c167 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/include/
H A DQualityMap_BW.c179 tab_Info.pIPTable = (void*)BWTABLE; in _MDrv_BW_PushBuffer()
H A Dk6_Bandwidth_RegTable.c161 code U8 BWTABLE[][REG_BW_ADDR_SIZE+REG_BW_BANK_SIZE+REG_BW_MASK_SIZE+BWTABLE_NUMS]= variable

12