Searched refs:reg32 (Results 1 – 7 of 7) sorted by relevance
528 regs->reg32.sw_filt_level_0 = pic_param->filter_level; in hal_vp8d_vdpu1_gen_regs()530 regs->reg32.sw_filt_level_0 = in hal_vp8d_vdpu1_gen_regs()532 regs->reg32.sw_filt_level_1 = in hal_vp8d_vdpu1_gen_regs()534 regs->reg32.sw_filt_level_2 = in hal_vp8d_vdpu1_gen_regs()536 regs->reg32.sw_filt_level_3 = in hal_vp8d_vdpu1_gen_regs()539 regs->reg32.sw_filt_level_0 = CLIP3(0, 63, in hal_vp8d_vdpu1_gen_regs()542 regs->reg32.sw_filt_level_1 = CLIP3(0, 63, in hal_vp8d_vdpu1_gen_regs()545 regs->reg32.sw_filt_level_2 = CLIP3(0, 63, in hal_vp8d_vdpu1_gen_regs()548 regs->reg32.sw_filt_level_3 = CLIP3(0, 63, in hal_vp8d_vdpu1_gen_regs()
229 } reg32; member
472 reg->reg32.sw_contrast_off1 = off1; in jpegd_setup_pp()473 reg->reg32.sw_contrast_off2 = off2; in jpegd_setup_pp()480 reg->reg32.sw_contrast_off1 = 0; in jpegd_setup_pp()481 reg->reg32.sw_contrast_off2 = 0; in jpegd_setup_pp()
131 } reg32; member
423 } reg32; /* 0x0080 */ member767 } reg32; /* 0x0280 */ member1111 } reg32; /* 0x0480 */ member1455 } reg32; /* 0x0680 */ member
579 } reg32; // 0x0280 member
703 dst_reg->sharp.reg32.sw_peaking1_ratio_p12 = peaking_ctrl_ratio_P12[1]; in set_shp_to_vdpp2_reg()704 dst_reg->sharp.reg32.sw_peaking1_ratio_p23 = peaking_ctrl_ratio_P23[1]; in set_shp_to_vdpp2_reg()