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Searched refs:num_tiles (Results 1 – 8 of 8) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkdec/vp9d/
H A Dhal_vp9d_vdpu34x.c279 RK_U32 num_tiles = pic_param->log2_tile_rows; in vp9d_refine_rcb_size() local
281 RK_U32 ext_align_size = num_tiles * 64 * 8; in vp9d_refine_rcb_size()
312 rcb_bits = width * (1 + 16 * bit_depth) + num_tiles * 192 * bit_depth + ext_align_size; in vp9d_refine_rcb_size()
336 RK_U32 num_tiles = pic_param->log2_tile_rows; in hal_vp9d_rcb_info_update() local
341 if (hw_ctx->num_row_tiles != num_tiles || in hal_vp9d_rcb_info_update()
373 hw_ctx->num_row_tiles = num_tiles; in hal_vp9d_rcb_info_update()
H A Dhal_vp9d_vdpu382.c348 RK_U32 num_tiles = pic_param->log2_tile_rows; in hal_vp9d_rcb_info_update() local
353 if (hw_ctx->num_row_tiles != num_tiles || in hal_vp9d_rcb_info_update()
385 hw_ctx->num_row_tiles = num_tiles; in hal_vp9d_rcb_info_update()
H A Dhal_vp9d_vdpu383.c448 RK_U32 num_tiles = pic_param->log2_tile_rows; in hal_vp9d_rcb_info_update() local
454 if (hw_ctx->num_row_tiles != num_tiles || in hal_vp9d_rcb_info_update()
487 hw_ctx->num_row_tiles = num_tiles; in hal_vp9d_rcb_info_update()
/rockchip-linux_mpp/mpp/codec/dec/av1/
H A Dav1d_cbs.c2198 RK_S32 num_tiles, tile_bits; in mpp_av1_tile_group_obu() local
2201 num_tiles = ctx->tile_cols * ctx->tile_rows; in mpp_av1_tile_group_obu()
2202 if (num_tiles > 1) in mpp_av1_tile_group_obu()
2207 if (num_tiles == 1 || !current->tile_start_and_end_present_flag) { in mpp_av1_tile_group_obu()
2209 infer(tg_end, num_tiles - 1); in mpp_av1_tile_group_obu()
2213 fc(tile_bits, tg_start, ctx->tile_num, num_tiles - 1); in mpp_av1_tile_group_obu()
2214 fc(tile_bits, tg_end, current->tg_start, num_tiles - 1); in mpp_av1_tile_group_obu()
2222 if (current->tg_end == num_tiles - 1) in mpp_av1_tile_group_obu()
/rockchip-linux_mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_vdpu382.c551 RK_U32 num_tiles = pp->num_tile_rows_minus1 + 1; in hal_h265d_rcb_info_update() local
553 if (reg_ctx->num_row_tiles != num_tiles || in hal_h265d_rcb_info_update()
576 reg_ctx->num_row_tiles = num_tiles; in hal_h265d_rcb_info_update()
H A Dhal_h265d_vdpu384a.c731 RK_U32 num_tiles = pp->num_tile_rows_minus1 + 1; in hal_h265d_rcb_info_update() local
734 if (reg_ctx->num_row_tiles != num_tiles || in hal_h265d_rcb_info_update()
758 reg_ctx->num_row_tiles = num_tiles; in hal_h265d_rcb_info_update()
H A Dhal_h265d_vdpu34x.c780 RK_U32 num_tiles = pp->num_tile_rows_minus1 + 1; in hal_h265d_rcb_info_update() local
782 if (reg_ctx->num_row_tiles != num_tiles || in hal_h265d_rcb_info_update()
805 reg_ctx->num_row_tiles = num_tiles; in hal_h265d_rcb_info_update()
H A Dhal_h265d_vdpu383.c735 RK_U32 num_tiles = pp->num_tile_rows_minus1 + 1; in hal_h265d_rcb_info_update() local
738 if (reg_ctx->num_row_tiles != num_tiles || in hal_h265d_rcb_info_update()
761 reg_ctx->num_row_tiles = num_tiles; in hal_h265d_rcb_info_update()