Searched refs:cudecis_thd1 (Results 1 – 4 of 4) sorted by relevance
652 reg->cudecis_thd1.delta4_thre_rough_mad32_intra_high2 = 2; in vepu510_h265_rdo_cfg()653 reg->cudecis_thd1.delta5_thre_rough_mad32_intra = 74; in vepu510_h265_rdo_cfg()654 reg->cudecis_thd1.delta6_thre_rough_mad32_intra = 106; in vepu510_h265_rdo_cfg()655 reg->cudecis_thd1.base_thre_fine_mad32_intra = 8; in vepu510_h265_rdo_cfg()656 reg->cudecis_thd1.delta0_thre_fine_mad32_intra = 0; in vepu510_h265_rdo_cfg()657 reg->cudecis_thd1.delta1_thre_fine_mad32_intra = 13; in vepu510_h265_rdo_cfg()658 reg->cudecis_thd1.delta2_thre_fine_mad32_intra_low3 = 6; in vepu510_h265_rdo_cfg()
1774 reg_rc->cudecis_thd1.delta4_thre_rough_mad32_intra_high2 = 2; in vepu511_h265_set_rdo_regs()1775 reg_rc->cudecis_thd1.delta5_thre_rough_mad32_intra = 74; in vepu511_h265_set_rdo_regs()1776 reg_rc->cudecis_thd1.delta6_thre_rough_mad32_intra = 106; in vepu511_h265_set_rdo_regs()1777 reg_rc->cudecis_thd1.base_thre_fine_mad32_intra = 8; in vepu511_h265_set_rdo_regs()1778 reg_rc->cudecis_thd1.delta0_thre_fine_mad32_intra = 0; in vepu511_h265_set_rdo_regs()1779 reg_rc->cudecis_thd1.delta1_thre_fine_mad32_intra = 13; in vepu511_h265_set_rdo_regs()1780 reg_rc->cudecis_thd1.delta2_thre_fine_mad32_intra_low3 = 6; in vepu511_h265_set_rdo_regs()
689 } cudecis_thd1; member
1305 } cudecis_thd1; member