Searched refs:column_width_minus1 (Results 1 – 11 of 11) sorted by relevance
171 USHORT column_width_minus1[19]; member
112 RK_S32 column_width_minus1[19]; member
139 pp->column_width_minus1[i] = pps->m_nTileColumnWidthArray[i] - 1; in fill_picture_parameters()
154 pp->column_width_minus1[i] = pps->bufs.column_width[i] - 1; in fill_picture_parameters()
392 column_width[i] = dxva_cxt->pp.column_width_minus1[i] + 1; in hal_h265d_v345_output_pps_packet()605 column_width[i] = dxva_cxt->pp.column_width_minus1[i] + 1; in hal_h265d_output_pps_packet()
355 column_width[i] = dxva_cxt->pp.column_width_minus1[i] + 1; in hal_h265d_v345_output_pps_packet()581 column_width[i] = dxva_cxt->pp.column_width_minus1[i] + 1; in hal_h265d_output_pps_packet()
348 column_width[i] = dxva_cxt->pp.column_width_minus1[i] + 1; in hal_h265d_v382_output_pps_packet()
533 column_width[i] = dxva_ctx->pp.column_width_minus1[i] + 1; in hal_h265d_v345_output_pps_packet()
565 column_width[i] = dxva_ctx->pp.column_width_minus1[i] + 1; in hal_h265d_v345_output_pps_packet()
1337 RK_S32 tile_ctu_endx = tile_start_x + syn->pp.column_width_minus1[index]; in vepu540_h265_set_me_ram()1642 RK_S32 tile_width = syn->pp.column_width_minus1[index] + 1; in hal_h265e_v540_set_uniform_tile()1765 tile_start_x += (syn->pp.column_width_minus1[k] + 1); in hal_h265e_v540_start()
285 RK_S32 tile_ctu_endx = tile_start_x + syn->pp.column_width_minus1[index]; in vepu580_h265_set_me_ram()2815 RK_S32 tile_width = syn->pp.column_width_minus1[index] + 1; in hal_h265e_v580_set_uniform_tile()2977 tile_start_x += (syn->pp.column_width_minus1[k] + 1); in hal_h265e_v580_start()