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Searched refs:cs2 (Results 1 – 7 of 7) sorted by relevance

/rk3399_rockchip-uboot/drivers/watchdog/
H A Dulp_wdog.c16 u8 cs2; member
69 val = readb(&wdog->cs2); in hw_watchdog_init()
71 writeb(val, &wdog->cs2); in hw_watchdog_init()
76 writeb(WDG_LPO_CLK, &wdog->cs2);/* setting 1-kHz clock source */ in hw_watchdog_init()
92 writeb(WDG_LPO_CLK, &wdog->cs2);/* setting 1-kHz clock source */ in reset_cpu()
/rk3399_rockchip-uboot/doc/
H A DREADME.fsl-ddr97 # bank(chip-select) interleaving cs2+cs3
100 # bank(chip-select) interleaving (cs0+cs1) and (cs2+cs3) (2x2)
103 # bank(chip-select) interleaving (cs0+cs1+cs2+cs3) (4x1)
/rk3399_rockchip-uboot/doc/device-tree-bindings/spi/
H A Dspi-bus.txt41 cs2 : &gpio1 1 0
/rk3399_rockchip-uboot/arch/arm/dts/
H A Darmada-370-xp.dtsi119 devbus-cs2 {
H A Darmada-388-clearfog.dts490 MPP43: spi1:cs2 x mikro cs
H A Darmada-38x.dtsi116 devbus-cs2 {
H A Darmada-375.dtsi149 devbus-cs2 {