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Searched refs:FW_DDR_MST6_REG (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3528/
H A Drk3528.c19 #define FW_DDR_MST6_REG 0x58 macro
400 val = readl(FIREWALL_DDR_BASE + FW_DDR_MST6_REG); in arch_cpu_init()
401 writel(val & 0x0000ffff, FIREWALL_DDR_BASE + FW_DDR_MST6_REG); in arch_cpu_init()
445 val = readl(FIREWALL_DDR_BASE + FW_DDR_MST6_REG); in arch_cpu_init()
446 writel(val & 0x0000ffff, FIREWALL_DDR_BASE + FW_DDR_MST6_REG); in arch_cpu_init()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3562/
H A Drk3562.c27 #define FW_DDR_MST6_REG 0x38 /* sdmmc mcu */ macro
645 val = readl(FIREWALL_DDR_BASE + FW_DDR_MST6_REG); in arch_cpu_init()
646 writel(val & 0xff0000ff, FIREWALL_DDR_BASE + FW_DDR_MST6_REG); in arch_cpu_init()