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Searched refs:sr (Results 1 – 13 of 13) sorted by relevance

/rk3399_ARM-atf/lib/compiler-rt/builtins/
H A Dudivmoddi4.c36 unsigned sr; in __udivmoddi4() local
90 sr = clzsi(d.s.high) - clzsi(n.s.high); in __udivmoddi4()
92 if (sr > n_uword_bits - 2) { in __udivmoddi4()
97 ++sr; in __udivmoddi4()
101 q.s.high = n.s.low << (n_uword_bits - sr); in __udivmoddi4()
103 r.s.high = n.s.high >> sr; in __udivmoddi4()
104 r.s.low = (n.s.high << (n_uword_bits - sr)) | (n.s.low >> sr); in __udivmoddi4()
115 sr = ctzsi(d.s.low); in __udivmoddi4()
116 q.s.high = n.s.high >> sr; in __udivmoddi4()
117 q.s.low = (n.s.high << (n_uword_bits - sr)) | (n.s.low >> sr); in __udivmoddi4()
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H A Dint_div_impl.inc19 unsigned sr = (d ? clz(d) : N) - (n ? clz(n) : N);
20 // 0 <= sr <= N - 1 or sr is very large.
21 if (sr > N - 1) // n < d
23 if (sr == N - 1) // d == 1
25 ++sr;
26 // 1 <= sr <= N - 1. Shifts do not trigger UB.
27 fixuint_t r = n >> sr;
28 n <<= N - sr;
30 for (; sr > 0; --sr) {
48 unsigned sr = (d ? clz(d) : N) - (n ? clz(n) : N);
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/rk3399_ARM-atf/drivers/nxp/i2c/
H A Di2c.c28 i2c_out(&ccsr_i2c->sr, I2C_SR_RST); in i2c_init()
35 unsigned char sr; in wait_for_state() local
40 sr = i2c_in(&ccsr_i2c->sr); in wait_for_state()
41 if (sr & I2C_SR_AL) { in wait_for_state()
42 i2c_out(&ccsr_i2c->sr, sr); in wait_for_state()
46 if ((sr & mask) == state) { in wait_for_state()
47 return (int)sr; in wait_for_state()
55 WARN("I2C: Timeout waiting for state 0x%x, sr = 0x%x\n", state, sr); in wait_for_state()
64 i2c_out(&ccsr_i2c->sr, I2C_SR_IF); in tx_byte()
109 i2c_out(&ccsr_i2c->sr, I2C_SR_IF); in i2c_write_addr()
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/rk3399_ARM-atf/drivers/mtd/nor/
H A Dspi_nor.c64 static inline int spi_nor_read_sr(uint8_t *sr) in spi_nor_read_sr() argument
66 return spi_nor_reg(SPI_NOR_OP_READ_SR, sr, 1U, SPI_MEM_DATA_IN); in spi_nor_read_sr()
86 uint8_t sr; in spi_nor_ready() local
89 ret = spi_nor_read_sr(&sr); in spi_nor_ready()
102 return (((fsr & FSR_READY) != 0U) && ((sr & SR_WIP) == 0U)) ? in spi_nor_ready()
106 return (((sr & SR_WIP) == 0U) ? 0 : 1); in spi_nor_ready()
126 uint8_t sr; in spi_nor_macronix_quad_enable() local
129 ret = spi_nor_read_sr(&sr); in spi_nor_macronix_quad_enable()
134 if ((sr & SR_QUAD_EN_MX) != 0U) { in spi_nor_macronix_quad_enable()
143 sr |= SR_QUAD_EN_MX; in spi_nor_macronix_quad_enable()
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/rk3399_ARM-atf/drivers/renesas/rza/pfc/
H A Dpfc.c151 if (pfc_mux_reg_tbl[cnt].sr.flg == PFC_ON) { in pfc_mux_setup()
152 mmio_write_64(pfc_mux_reg_tbl[cnt].sr.reg, in pfc_mux_setup()
153 pfc_mux_reg_tbl[cnt].sr.val); in pfc_mux_setup()
194 if (pfc_qspi_reg_tbl[cnt].sr.flg == PFC_ON) { in pfc_qspi_setup()
195 mmio_write_64(pfc_qspi_reg_tbl[cnt].sr.reg, in pfc_qspi_setup()
196 pfc_qspi_reg_tbl[cnt].sr.val); in pfc_qspi_setup()
H A Dpfc_regs.h744 PFC_REG_UINT64 sr; member
/rk3399_ARM-atf/drivers/st/crypto/
H A Dstm32_rng.c121 uint32_t sr; in stm32_rng_enable() local
144 sr = mmio_read_32(stm32_rng.base + RNG_SR); in stm32_rng_enable()
145 while ((sr & RNG_SR_DRDY) == 0U) { in stm32_rng_enable()
151 if ((sr & (RNG_SR_SECS | RNG_SR_SEIS)) != 0U) { in stm32_rng_enable()
157 sr = mmio_read_32(stm32_rng.base + RNG_SR); in stm32_rng_enable()
H A Dstm32_pka.c439 uint32_t sr; in stm32_pka_ecdsa_verif_check_return() local
441 sr = mmio_read_32(base + _PKA_SR); in stm32_pka_ecdsa_verif_check_return()
442 if ((sr & (_PKA_IT_OPERR | _PKA_IT_ADDRERR | _PKA_IT_RAMERR)) != 0) { in stm32_pka_ecdsa_verif_check_return()
444 (sr & _PKA_IT_OPERR) ? "Operation " : "", in stm32_pka_ecdsa_verif_check_return()
445 (sr & _PKA_IT_ADDRERR) ? "Address " : "", in stm32_pka_ecdsa_verif_check_return()
446 (sr & _PKA_IT_RAMERR) ? "RAM" : ""); in stm32_pka_ecdsa_verif_check_return()
/rk3399_ARM-atf/drivers/renesas/common/watchdog/
H A Dswdt.c80 uint32_t rmsk, sr; in rcar_swdt_init() local
132 sr = mmio_read_32(SWDT_WTCSRA) & WTCSRA_MASK_ALL; in rcar_swdt_init()
133 mmio_write_32(SWDT_WTCSRA, (WTCSRA_UPPER_BYTE | sr | SWDT_ENABLE)); in rcar_swdt_init()
/rk3399_ARM-atf/include/drivers/nxp/i2c/
H A Di2c.h39 unsigned char sr; /* I2c Bus Status Register */ member
/rk3399_ARM-atf/drivers/qti/accesscontrol/vmidmt/
H A Dvmidmt_hal.c929 struct hal_vmidmt_error *err, uint32_t *sr, in vmidmt_hal_get_error_sec() argument
932 *sr = VMIDMT_IN(p->base_addr, SGFSR); in vmidmt_hal_get_error_sec()
946 uint32_t *sr, uint32_t *s0, uint32_t *s1, in vmidmt_hal_get_error_nsec() argument
949 *sr = VMIDMT_IN(p->base_addr, NSGFSR); in vmidmt_hal_get_error_nsec()
967 uint32_t s0, s1, s2, sr; in vmidmt_hal_get_error() local
975 vmidmt_hal_get_error_sec(p, err, &sr, &s0, &s1, &s2); in vmidmt_hal_get_error()
977 vmidmt_hal_get_error_nsec(p, err, &sr, &s0, &s1, &s2); in vmidmt_hal_get_error()
980 if (sr & VMIDMT_FMSK(GFSR, CLMULTI)) in vmidmt_hal_get_error()
983 if (sr & VMIDMT_FMSK(GFSR, CFGMULTI)) in vmidmt_hal_get_error()
986 if (sr & VMIDMT_FMSK(GFSR, PF)) in vmidmt_hal_get_error()
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/rk3399_ARM-atf/plat/brcm/board/stingray/src/
H A Dpaxb.c860 paxb = paxb_get_config(sr); in paxb_set_config()
/rk3399_ARM-atf/include/plat/marvell/odyssey/csr/
H A Dody-csrs-gic.h1761 uint64_t sr : 1; member