| #
8d9c1b3c |
| 16-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st-format-signedness" into integration
* changes:
feat(stm32mp1): enable format-signedness warning
fix(stm32mp1): correct types in messages
fix(st-pmic): correct verb
Merge changes from topic "st-format-signedness" into integration
* changes:
feat(stm32mp1): enable format-signedness warning
fix(stm32mp1): correct types in messages
fix(st-pmic): correct verbose message
fix(st-sdmmc2): correct cmd_idx type in messages
fix(st-fmc): fix type in message
fix(mtd): correct types in messages
fix(usb): correct type in message
fix(tzc400): correct message with filter
fix(psci): correct parent_node type in messages
fix(libc): correct some messages
fix(fconf): correct image_id type in messages
fix(bl2): correct messages with image_id
show more ...
|
| #
6e86b462 |
| 14-Feb-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(mtd): correct types in messages
Some messages don't use the correct types, update them.
This avoids warning when -Wformat-signedness is enabled.
Change-Id: Ie5384a7d139c48a623e1617c93d15fecc8a3
fix(mtd): correct types in messages
Some messages don't use the correct types, update them.
This avoids warning when -Wformat-signedness is enabled.
Change-Id: Ie5384a7d139c48a623e1617c93d15fecc8a36061
Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| #
156a6e13 |
| 01-Jul-2021 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(drivers/mtd): macronix quad enable bit issue" into integration
|
| #
ce36b311 |
| 28-Jun-2021 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(drivers/mtd): fix MISRA issues and logic improvement" into integration
|
| #
c3327408 |
| 24-Nov-2020 |
Lionel Debieve <lionel.debieve@st.com> |
fix(drivers/mtd): macronix quad enable bit issue
Invert test logic on the status register control to
fix issue when the bit SR_QUAD_EN_MX is not set.
Change-Id: I8b2f140219f124336bf96462abf9d9445d0
fix(drivers/mtd): macronix quad enable bit issue
Invert test logic on the status register control to
fix issue when the bit SR_QUAD_EN_MX is not set.
Change-Id: I8b2f140219f124336bf96462abf9d9445d0308bc
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| #
5130ad14 |
| 24-Nov-2020 |
Lionel Debieve <lionel.debieve@st.com> |
fix(drivers/mtd): fix MISRA issues and logic improvement
Fix MISRA issues and invert the spi_nor_ready status
to improve readability.
Remove an unneeded variable initialization.
Change-Id: I25a97fb
fix(drivers/mtd): fix MISRA issues and logic improvement
Fix MISRA issues and invert the spi_nor_ready status
to improve readability.
Remove an unneeded variable initialization.
Change-Id: I25a97fbd6c4389156b4f077b986019fa7c30a457
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| #
e89b8131 |
| 25-Sep-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "stm32_drivers_update" into integration
* changes:
clk: stm32mp1: fix rcc mckprot status
drivers: st: add missing includes in ETZPC header
mmc: st: clear some flags be
Merge changes from topic "stm32_drivers_update" into integration
* changes:
clk: stm32mp1: fix rcc mckprot status
drivers: st: add missing includes in ETZPC header
mmc: st: clear some flags before sending a command
mmc: st: correct retries management
nand: raw_nand: fix timeout issue in nand_wait_ready
mtd: spi_nor: change message level on macronix detection
gpio: stm32_gpio: check GPIO node status after checking DT
crypto: stm32_hash: fix issue when restarting computation
show more ...
|
| #
6751b836 |
| 27-Apr-2020 |
Lionel Debieve <lionel.debieve@st.com> |
mtd: spi_nor: change message level on macronix detection
Change the detection message from WARN to INFO when macronix
NOR is detected.
Change-Id: I488696f1fb75b823e85decfcd6cd32e7b36a6c2e
Signed-of
mtd: spi_nor: change message level on macronix detection
Change the detection message from WARN to INFO when macronix
NOR is detected.
Change-Id: I488696f1fb75b823e85decfcd6cd32e7b36a6c2e
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| #
0a910952 |
| 20-Jan-2020 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "ld/mtd_framework" into integration
* changes:
doc: stm32mp1: Update build command line
fdts: stm32mp1: remove second QSPI flash instance
stm32mp1: Add support for SPI
Merge changes from topic "ld/mtd_framework" into integration
* changes:
doc: stm32mp1: Update build command line
fdts: stm32mp1: remove second QSPI flash instance
stm32mp1: Add support for SPI-NOR boot device
stm32mp1: Add support for SPI-NAND boot device
spi: stm32_qspi: Add QSPI support
fdts: stm32mp1: update for FMC2 pin muxing
stm32mp1: Add support for raw NAND boot device
fmc: stm32_fmc2_nand: Add FMC2 driver support
stm32mp1: Reduce MAX_XLAT_TABLES to 4
io: stm32image: fix device_size type
stm32mp: add DT helper for reg by name
stm32mp1: add compilation flags for boot devices
lib: utils_def: add CLAMP macro
compiler_rt: Import popcountdi2.c and popcountsi2.c files
Add SPI-NOR framework
Add SPI-NAND framework
Add SPI-MEM framework
Add raw NAND framework
show more ...
|
| #
a13550d0 |
| 24-Sep-2019 |
Lionel Debieve <lionel.debieve@st.com> |
Add SPI-NOR framework
SPI-NOR framework is based on SPI-MEM framework using
spi_mem_op execution interface.
It implements read functions and allows NOR configuration
up to quad mode.
Default manage
Add SPI-NOR framework
SPI-NOR framework is based on SPI-MEM framework using
spi_mem_op execution interface.
It implements read functions and allows NOR configuration
up to quad mode.
Default management is 1 data line but it can be overridden
by platform.
It also includes specific quad mode configuration for
Spansion, Micron and Macronix memories.
Change-Id: If49502b899b4a75f6ebc3190f6bde1013651197f
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
show more ...
|