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Searched refs:res (Results 1 – 25 of 78) sorted by relevance

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/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_hwreq.c16 uint32_t res; in spm_hwcg_index2res() local
23 res = (MT_SPM_DRAM_S0 | MT_SPM_DRAM_S1 | MT_SPM_EMI); in spm_hwcg_index2res()
26 res = MT_SPM_SYSPLL; in spm_hwcg_index2res()
29 res = MT_SPM_INFRA; in spm_hwcg_index2res()
32 res = MT_SPM_PMIC; in spm_hwcg_index2res()
35 res = MT_SPM_26M; in spm_hwcg_index2res()
38 res = MT_SPM_VCORE; in spm_hwcg_index2res()
41 res = 0; in spm_hwcg_index2res()
43 return res; in spm_hwcg_index2res()
85 void spm_hwcg_ctrl(uint32_t res, enum spm_hwcg_setting type, in spm_hwcg_ctrl() argument
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/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_hwreq.c16 uint32_t res; in spm_hwcg_index2res() local
23 res = (MT_SPM_DRAM_S0 | MT_SPM_DRAM_S1 | MT_SPM_EMI); in spm_hwcg_index2res()
26 res = MT_SPM_SYSPLL; in spm_hwcg_index2res()
29 res = MT_SPM_INFRA; in spm_hwcg_index2res()
32 res = MT_SPM_PMIC; in spm_hwcg_index2res()
35 res = MT_SPM_26M; in spm_hwcg_index2res()
38 res = MT_SPM_VCORE; in spm_hwcg_index2res()
41 res = 0; in spm_hwcg_index2res()
43 return res; in spm_hwcg_index2res()
85 void spm_hwcg_ctrl(uint32_t res, enum spm_hwcg_setting type, uint32_t is_set, in spm_hwcg_ctrl() argument
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H A Dmt_spm_cond.c21 struct mt_spm_cond_tables *res) in mt_spm_cond_check() argument
31 if (res && res->table_cg) { in mt_spm_cond_check()
32 res->table_cg[i] = in mt_spm_cond_check()
35 if (res->table_cg[i]) in mt_spm_cond_check()
45 if (res) { in mt_spm_cond_check()
46 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check()
48 if (res->table_pll) in mt_spm_cond_check()
49 b_res |= (res->table_pll << SPM_COND_BLOCKED_PLL_IDX) | in mt_spm_cond_check()
59 struct mt_spm_cond_tables *res) in mt_spm_dump_all_pll() argument
63 if (res) { in mt_spm_dump_all_pll()
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/rk3399_ARM-atf/plat/mediatek/common/lpm_v2/
H A Dmt_lp_rm.c56 int res = 0; in mt_lp_rm_get_status() local
67 res = (*con)->get_status(type, priv); in mt_lp_rm_get_status()
68 if (res == MT_RM_STATUS_STOP) in mt_lp_rm_get_status()
72 return res; in mt_lp_rm_get_status()
77 int res = MT_RM_STATUS_BAD; in mt_lp_rm_do_constraint() local
82 return res; in mt_lp_rm_do_constraint()
86 res = rc->run(cpuid, stateid); in mt_lp_rm_do_constraint()
88 return res; in mt_lp_rm_do_constraint()
95 int res = MT_RM_STATUS_BAD; in mt_lp_rm_find_constraint() local
100 return res; in mt_lp_rm_find_constraint()
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H A Dmt_lpm_dispatch.c30 uint64_t res = 0; in invoke_mt_lpm_dispatch() local
34 return res; in invoke_mt_lpm_dispatch()
39 res = mt_dispatcher.fn[user](MT_LPM_SMC_USER_ID(x1), in invoke_mt_lpm_dispatch()
44 return res; in invoke_mt_lpm_dispatch()
53 uint64_t res = 0; in invoke_mt_secure_lpm_dispatch() local
57 return res; in invoke_mt_secure_lpm_dispatch()
61 res = mt_secure_dispatcher.fn[user](MT_LPM_SMC_USER_ID(x1), x2, in invoke_mt_secure_lpm_dispatch()
65 return res; in invoke_mt_secure_lpm_dispatch()
/rk3399_ARM-atf/plat/mediatek/common/lpm/
H A Dmt_lp_rm.c58 int res = 0; in mt_lp_rm_get_status() local
70 res = (*con)->get_status(type, priv); in mt_lp_rm_get_status()
71 if (res == MT_RM_STATUS_STOP) { in mt_lp_rm_get_status()
76 return res; in mt_lp_rm_get_status()
81 int res = MT_RM_STATUS_BAD; in mt_lp_rm_do_constraint() local
86 return res; in mt_lp_rm_do_constraint()
91 res = rc->run(cpuid, stateid); in mt_lp_rm_do_constraint()
94 return res; in mt_lp_rm_do_constraint()
101 int res = MT_RM_STATUS_BAD; in mt_lp_rm_find_constraint() local
106 return res; in mt_lp_rm_find_constraint()
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H A Dmt_lpm_dispatch.c26 uint64_t res = 0; in invoke_mt_lpm_dispatch() local
35 res = mt_dispatcher.fn[user](MT_LPM_SMC_USER_ID(x1), in invoke_mt_lpm_dispatch()
43 return res; in invoke_mt_lpm_dispatch()
54 uint64_t res = 0; in invoke_mt_secure_lpm_dispatch() local
62 res = mt_secure_dispatcher.fn[user](MT_LPM_SMC_USER_ID(x1), in invoke_mt_secure_lpm_dispatch()
70 return res; in invoke_mt_secure_lpm_dispatch()
/rk3399_ARM-atf/drivers/brcm/emmc/
H A Demmc_csl_sdcmd.c21 int res; in sd_cmd0() local
25 res = send_cmd(handle, SD_CMD_GO_IDLE_STATE, argument, 0, NULL); in sd_cmd0()
27 if (res == SD_OK) { in sd_cmd0()
32 return res; in sd_cmd0()
37 int res; in sd_cmd1() local
49 res = send_cmd(handle, SD_CMD_SEND_OPCOND, ocr, options, &resp); in sd_cmd1()
51 if (res == SD_OK) in sd_cmd1()
54 return res; in sd_cmd1()
70 int res; in sd_cmd3() local
84 res = send_cmd(handle, SD_CMD_MMC_SET_RCA, argument, options, &resp); in sd_cmd3()
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/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/
H A Dmt_cpu_pm_smc.c38 uint64_t res = 0; in cpupm_dispatcher() local
42 res = mtk_cpc_handler(act, arg1, arg2); in cpupm_dispatcher()
48 return res; in cpupm_dispatcher()
58 uint64_t res = 0; in cpupm_lp_dispatcher() local
64 res = mtk_cpc_handler(act, arg1, arg2); in cpupm_lp_dispatcher()
69 res = (uint64_t)mt_lp_irqremain_count(); in cpupm_lp_dispatcher()
104 res = 0; in cpupm_lp_dispatcher()
106 res = (uint64_t)info.val; in cpupm_lp_dispatcher()
123 res = (uint64_t)mtk_cpu_pm_counter_enabled(); in cpupm_lp_dispatcher()
128 res = mtk_mcusys_off_record_cnt_get(); in cpupm_lp_dispatcher()
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H A Dmt_cpu_pm_cpc.c287 unsigned int res = 0; in mtk_cpc_read_config() local
291 res = mmio_read_32(CPC_MCUSYS_CPC_DBG_SETTING) & CPC_PROF_EN in mtk_cpc_read_config()
298 return res; in mtk_cpc_read_config()
407 uint64_t res = 0; in mtk_cpc_prof_latency() local
414 res = (uint64_t)mtk_cpc_prof_is_enabled(); in mtk_cpc_prof_latency()
417 res = mtk_cpc_prof_dev_num(); in mtk_cpc_prof_latency()
420 res = mtk_cpc_prof_dev_name(arg); in mtk_cpc_prof_latency()
430 res = (uint64_t)mtk_cpc_prof_read(prof_act, arg); in mtk_cpc_prof_latency()
437 return res; in mtk_cpc_prof_latency()
442 uint64_t res = 0; in mtk_cpc_handler() local
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/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_cond.c132 struct mt_spm_cond_tables *res) in mt_spm_cond_check() argument
143 if (res != NULL) { in mt_spm_cond_check()
144 res->table_cg[i] = (src->table_cg[i] & dest->table_cg[i]); in mt_spm_cond_check()
145 if (is_system_suspend && ((res->table_cg[i]) != 0U)) { in mt_spm_cond_check()
148 res->table_cg[i]); in mt_spm_cond_check()
151 if ((res->table_cg[i]) != 0U) { in mt_spm_cond_check()
160 if (res != NULL) { in mt_spm_cond_check()
161 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check()
163 if ((res->table_pll) != 0U) { in mt_spm_cond_check()
164 b_res |= (res->table_pll << SPM_COND_BLOCKED_PLL_IDX) | in mt_spm_cond_check()
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/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_cond.c101 struct mt_spm_cond_tables *res) in mt_spm_cond_check() argument
111 if (res != NULL) { in mt_spm_cond_check()
112 res->table_cg[i] = (src->table_cg[i] & dest->table_cg[i]); in mt_spm_cond_check()
113 if (is_system_suspend && ((res->table_cg[i]) != 0U)) { in mt_spm_cond_check()
116 res->table_cg[i]); in mt_spm_cond_check()
119 if ((res->table_cg[i]) != 0U) { in mt_spm_cond_check()
128 if (res != NULL) { in mt_spm_cond_check()
129 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check()
131 if (res->table_pll != 0U) { in mt_spm_cond_check()
132 blocked |= (res->table_pll << SPM_COND_BLOCKED_PLL_IDX) | in mt_spm_cond_check()
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/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_cond.c105 struct mt_spm_cond_tables *res) in mt_spm_cond_check() argument
115 if (res != NULL) { in mt_spm_cond_check()
116 res->table_cg[i] = in mt_spm_cond_check()
119 if (is_system_suspend && (res->table_cg[i] != 0U)) { in mt_spm_cond_check()
122 res->table_cg[i]); in mt_spm_cond_check()
125 if (res->table_cg[i] != 0U) { in mt_spm_cond_check()
134 if (res != NULL) { in mt_spm_cond_check()
135 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check()
137 if (res->table_pll != 0U) { in mt_spm_cond_check()
139 (res->table_pll << SPM_COND_BLOCKED_PLL_IDX) | in mt_spm_cond_check()
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/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_cond.c122 struct mt_spm_cond_tables *res) in mt_spm_cond_check() argument
132 if (res != NULL) { in mt_spm_cond_check()
133 res->table_cg[i] = in mt_spm_cond_check()
136 if (is_system_suspend && (res->table_cg[i] != 0U)) { in mt_spm_cond_check()
139 res->table_cg[i]); in mt_spm_cond_check()
142 if (res->table_cg[i] != 0U) { in mt_spm_cond_check()
151 if (res != NULL) { in mt_spm_cond_check()
152 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check()
154 if (res->table_pll != 0U) { in mt_spm_cond_check()
156 (res->table_pll << SPM_COND_BLOCKED_PLL_IDX) | in mt_spm_cond_check()
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/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/constraints/
H A Dmt_spm_rc_api.c22 int res = 0; in spm_rc_condition_modifier() local
30 res = -1; in spm_rc_condition_modifier()
45 res = -1; in spm_rc_condition_modifier()
47 res = -1; in spm_rc_condition_modifier()
52 return res; in spm_rc_condition_modifier()
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv3_2/
H A Dmt_cpu_pm_cpc.c184 unsigned int res = 0; in mtk_cpc_read_config() local
188 res = (mmio_read_32(CPC_MCUSYS_CPC_DBG_SETTING) & CPC_PROF_EN) ? 1 : 0; in mtk_cpc_read_config()
191 res = cpc.auto_off; in mtk_cpc_read_config()
194 res = TICKS_TO_US(cpc.auto_thres_tick); in mtk_cpc_read_config()
201 return res; in mtk_cpc_read_config()
206 uint64_t res = 0; in mtk_cpc_handler() local
213 res = mtk_cpc_read_config((unsigned int)arg1); in mtk_cpc_handler()
221 return res; in mtk_cpc_handler()
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/mcdi/
H A Dmt_cpu_pm_cpc.c207 uint32_t res = 0U; in mtk_cpc_read_config() local
211 res = (mmio_read_32(CPC_MCUSYS_CPC_DBG_SETTING) & CPC_PROF_EN) ? in mtk_cpc_read_config()
215 res = cpc.auto_off; in mtk_cpc_read_config()
218 res = ticks_to_us(cpc.auto_thres_tick); in mtk_cpc_read_config()
226 return res; in mtk_cpc_read_config()
231 uint64_t res = 0ULL; in mtk_cpc_handler() local
244 res = mtk_cpc_read_config((uint32_t)arg1); in mtk_cpc_handler()
250 return res; in mtk_cpc_handler()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/mcdi/
H A Dmt_cpu_pm_cpc.c207 uint32_t res = 0U; in mtk_cpc_read_config() local
211 res = (mmio_read_32(CPC_MCUSYS_CPC_DBG_SETTING) & CPC_PROF_EN) ? in mtk_cpc_read_config()
215 res = cpc.auto_off; in mtk_cpc_read_config()
218 res = ticks_to_us(cpc.auto_thres_tick); in mtk_cpc_read_config()
226 return res; in mtk_cpc_read_config()
231 uint64_t res = 0ULL; in mtk_cpc_handler() local
244 res = mtk_cpc_read_config((uint32_t)arg1); in mtk_cpc_handler()
250 return res; in mtk_cpc_handler()
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/mcdi/
H A Dmt_cpu_pm_cpc.c207 uint32_t res = 0U; in mtk_cpc_read_config() local
211 res = (mmio_read_32(CPC_MCUSYS_CPC_DBG_SETTING) & CPC_PROF_EN) ? in mtk_cpc_read_config()
215 res = cpc.auto_off; in mtk_cpc_read_config()
218 res = ticks_to_us(cpc.auto_thres_tick); in mtk_cpc_read_config()
226 return res; in mtk_cpc_read_config()
231 uint64_t res = 0ULL; in mtk_cpc_handler() local
244 res = mtk_cpc_read_config((uint32_t)arg1); in mtk_cpc_handler()
250 return res; in mtk_cpc_handler()
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/constraints/
H A Dmt_spm_rc_bus26m.c114 int res = 0; in do_irqs_delivery() local
118 res = spm_conservation_get_result(&wakeup); in do_irqs_delivery()
120 if ((res != 0) && (irqs == NULL)) { in do_irqs_delivery()
156 int res = MT_RM_STATUS_OK; in spm_update_rc_bus26m() local
159 res = MT_RM_STATUS_BAD; in spm_update_rc_bus26m()
173 res = MT_RM_STATUS_BAD; in spm_update_rc_bus26m()
177 return res; in spm_update_rc_bus26m()
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/constraints/
H A Dmt_spm_rc_api.c18 int res = 0; in spm_rc_condition_modifier() local
26 res = -1; in spm_rc_condition_modifier()
38 res = -1; in spm_rc_condition_modifier()
49 res = -1; in spm_rc_condition_modifier()
52 res = -1; in spm_rc_condition_modifier()
58 return res; in spm_rc_condition_modifier()
H A Dmt_spm_rc_syspll.c119 int res = MT_RM_STATUS_OK; in update_rc_condition() local
133 return res; in update_rc_condition()
228 int res = MT_RM_STATUS_OK; in spm_update_rc_syspll() local
232 res = update_rc_condition(state_id, val); in spm_update_rc_syspll()
253 return res; in spm_update_rc_syspll()
349 int res = 0; in spm_get_status_rc_syspll() local
356 res = spm_rc_constraint_status_get(st->id, st->type, st->act, in spm_get_status_rc_syspll()
360 if ((res == 0) && (st->id != MT_RM_CONSTRAINT_ID_ALL)) { in spm_get_status_rc_syspll()
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/constraints/
H A Dmt_spm_rc_bus26m.c111 int res = 0; in do_irqs_delivery() local
115 res = spm_conservation_get_result(&wakeup); in do_irqs_delivery()
117 if ((res != 0) && (irqs == NULL)) { in do_irqs_delivery()
155 int res = MT_RM_STATUS_OK; in spm_update_rc_bus26m() local
173 res = MT_RM_STATUS_BAD; in spm_update_rc_bus26m()
176 return res; in spm_update_rc_bus26m()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/constraints/
H A Dmt_spm_rc_bus26m.c121 int res = 0; in do_irqs_delivery() local
125 res = spm_conservation_get_result(&wakeup); in do_irqs_delivery()
127 if ((res != 0) && (irqs == NULL)) { in do_irqs_delivery()
165 int res = MT_RM_STATUS_OK; in spm_update_rc_bus26m() local
183 res = MT_RM_STATUS_BAD; in spm_update_rc_bus26m()
186 return res; in spm_update_rc_bus26m()
/rk3399_ARM-atf/include/lib/
H A Dutils_def.h153 #define add_overflow(a, b, res) __builtin_add_overflow((a), (b), (res)) argument
161 #define round_up_overflow(v, size, res) (__extension__({ \ argument
162 typeof(res) __res = res; \
176 #define add_with_round_up_overflow(a, b, size, res) (__extension__({ \ argument
181 round_up_overflow(__add_res, (size), (res)) ? 1 : 0; \

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