Searched refs:pll_reg (Results 1 – 1 of 1) sorted by relevance
142 union plat_pll_reg pll_reg; in plat_get_pll_rate() local148 pll_reg.w = mmio_read_32(SCU_CPU_HPLL); in plat_get_pll_rate()151 pll_reg.w = mmio_read_32(SCU_CPU_DPLL); in plat_get_pll_rate()154 pll_reg.w = mmio_read_32(SCU_CPU_MPLL); in plat_get_pll_rate()177 if (pll_reg.b.bypass == 0U) { in plat_get_pll_rate()180 mul = (pll_reg.b.m) / ((pll_reg.b.n + 1)); in plat_get_pll_rate()181 div = (pll_reg.b.p + 1); in plat_get_pll_rate()184 mul = (pll_reg.b.m + 1) / ((pll_reg.b.n + 1) * 2); in plat_get_pll_rate()185 div = (pll_reg.b.p + 1); in plat_get_pll_rate()