Searched refs:pll_freq1_reg (Results 1 – 1 of 1) sorted by relevance
1166 uintptr_t pll_freq1_reg = A35SSC_BASE + A35_SS_PLL_FREQ1; in clk_get_pll1_fvco() local1169 reg = mmio_read_32(pll_freq1_reg); in clk_get_pll1_fvco()1870 uintptr_t pll_freq1_reg = a35_ss_address + A35_SS_PLL_FREQ1; in stm32mp2_a35_pll1_config() local1873 mmio_clrsetbits_32(pll_freq1_reg, A35_SS_PLL_FREQ1_REFDIV_MASK, in stm32mp2_a35_pll1_config()1877 mmio_clrsetbits_32(pll_freq1_reg, A35_SS_PLL_FREQ1_FBDIV_MASK, in stm32mp2_a35_pll1_config()