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/rk3399_ARM-atf/drivers/st/regulator/
H A Dregulator_core.c293 int regulator_list_voltages(const struct rdev *rdev, const uint16_t **levels, size_t *count) in regulator_list_voltages() argument
299 assert(levels != NULL); in regulator_list_voltages()
310 ret = rdev->desc->ops->list_voltages(rdev->desc, levels, count); in regulator_list_voltages()
324 while ((n > 1U) && ((*levels)[n - 1U] > rdev->max_mv)) { in regulator_list_voltages()
329 if (rdev->max_mv != (*levels)[n - 1]) { in regulator_list_voltages()
335 while ((n > 1U) && ((*levels[0U]) < rdev->min_mv)) { in regulator_list_voltages()
336 (*levels)++; in regulator_list_voltages()
348 if (rdev->min_mv != (*levels)[0U]) { in regulator_list_voltages()
464 const uint16_t *levels; in parse_dt() local
507 ret = regulator_list_voltages(rdev, &levels, &size); in parse_dt()
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/rk3399_ARM-atf/include/drivers/st/
H A Dregulator.h56 int regulator_list_voltages(const struct rdev *rdev, const uint16_t **levels, size_t *count);
82 const uint16_t **levels, size_t *count);
H A Dstpmic1.h184 int stpmic1_regulator_levels_mv(const char *name, const uint16_t **levels,
H A Dstpmic2.h389 uint8_t id, const uint16_t **levels,
/rk3399_ARM-atf/docs/components/
H A Dexception-handling.rst95 priority levels as applicable for the Secure software stack. It then assigns the
96 dispatchers to one or more priority levels. The dispatchers then register
97 handlers for the priority levels at runtime. A dispatcher can register handlers
100 .. __: `Partitioning priority levels`_
132 stack—priority levels stack up in strictly increasing fashion, and need to be
135 `Transition of priority levels`_.
166 interrupts into distinct priority levels. A dispatcher that chooses to receive
167 interrupts can then *own* one or more priority levels, and register interrupt
171 Dispatchers are assigned interrupt priority levels in two steps:
173 .. _Partitioning priority levels:
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H A Dcontext-management-library.rst102 for lower exception levels.
241 corresponding registers from lower exception levels. Because debug and
255 state of CPU across exception levels for a given security state are listed below.
460 lower exception levels of Secure and Realm worlds. In this scenario, we save the
533 values to lower exception levels when traps occur. The cached values stored in
550 lower exception levels NS(EL2/EL1) will carry forward those values to EL3.
559 registers configured for lower exception levels.
H A Dxlat-tables-lib-v2-design.rst344 allows up to 4 lookup levels).
355 memory than expected. The reason is that all levels of translation are
362 on the page size, levels 0 and 1 of translation may only allow table
H A Dras.rst97 FEAT_E3DSE provides a mechanism for EL3 to inject a virtual SError into lower exception levels.
360 priority levels>` for handling RAS exceptions. The platform must then define
H A Dsecure-partition-manager.rst52 SPMC) residing at different exception levels. To permit the FF-A specification
H A Dsecure-partition-manager-mm.rst252 depending on the implemented Exception levels. In S-EL0, the Supervisor Call
/rk3399_ARM-atf/drivers/st/pmic/
H A Dstm32mp_pmic2.c281 const uint16_t **levels, size_t *count) in pmic2_list_voltages() argument
300 if (levels != NULL) { in pmic2_list_voltages()
301 *levels = &regul->bypass_mv; in pmic2_list_voltages()
307 return stpmic2_regulator_levels_mv(pmic2, regul->id, levels, count); in pmic2_list_voltages()
H A Dstpmic1.c799 int stpmic1_regulator_levels_mv(const char *name, const uint16_t **levels, in stpmic1_regulator_levels_mv() argument
806 *levels = ldo3_special_mode_table; in stpmic1_regulator_levels_mv()
809 *levels = regul->voltage_table; in stpmic1_regulator_levels_mv()
H A Dstpmic2.c261 uint8_t id, const uint16_t **levels, in stpmic2_regulator_levels_mv() argument
269 if (levels != NULL) { in stpmic2_regulator_levels_mv()
270 *levels = regul->volt_table; in stpmic2_regulator_levels_mv()
H A Dstm32mp_pmic.c317 const uint16_t **levels, size_t *count) in pmic_list_voltages() argument
321 return stpmic1_regulator_levels_mv(desc->node_name, levels, count); in pmic_list_voltages()
/rk3399_ARM-atf/docs/perf/
H A Dperformance-monitoring-unit.rst18 The PMU makes 32 counters available at all privilege levels:
50 ``PMCR`` registers. These can be accessed at all privilege levels.
H A Dpsci-performance-juno.rst26 levels 0, 1 and 2 respectively. It does not support any retention states.
/rk3399_ARM-atf/docs/process/
H A Dsecurity-hardening.rst33 levels must defend from those below when the PMU is treated as an attack
71 exception levels) it instructs counters to increment, obtaining event counts
H A Dcoding-guidelines.rst508 levels of "weakness". This has resulted in bugs in the past.
/rk3399_ARM-atf/docs/design/
H A Dpsci-pd-tree.rst20 levels in the power domain tree to four.
37 domains at higher levels. For example, only a core power domain can be identified
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-7.rst80 lower exception levels to temporarily disable the mitigation in their execution
/rk3399_ARM-atf/docs/threat_model/firmware_threat_model/
H A Dthreat_model_arm_cca.rst126 and R-EL0 levels.
H A Dthreat_model.rst147 | | world, including NS-EL0 NS-EL1 and NS-EL2 levels |
150 | | world, including S-EL0 and S-EL1 levels |
244 .. table:: Table 5: Overall risk levels and corresponding aggregate scores
/rk3399_ARM-atf/docs/
H A Dporting-guide.rst138 levels in the platform.
153 tree at all the power domain levels used by the platform.
1486 correspond to one of the standard log levels defined in debug.h. The platform
1489 increase the number of log levels.
2902 differently at CPU level versus higher levels. As an example, if the element at
2905 residency statistics. For higher levels (array indices > 0), the residency
2920 differently at CPU level versus higher levels. As an example, if the element at
2923 residency statistics. For higher levels (array indices > 0), the residency
2938 all its parent power domain levels are also woken up. The generic PSCI code
3041 powering off the calling CPU and its higher parent power domain levels as
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H A Darchitecture_features.rst457 higher exception levels, other features might be used by TF-A code itself.
/rk3399_ARM-atf/docs/getting_started/
H A Drt-svc-writers-guide.rst11 levels lower than EL3 will request runtime services using the Secure Monitor

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