| /rk3399_ARM-atf/drivers/st/ddr/phy/firmware/include/ |
| H A D | mnpmusrammsgblock_ddr3.h | 415 int8_t cdd_rr_3_2; /* 420 int8_t cdd_rr_3_1; /* 425 int8_t cdd_rr_3_0; /* 430 int8_t cdd_rr_2_3; /* 435 int8_t cdd_rr_2_1; /* 440 int8_t cdd_rr_2_0; /* 445 int8_t cdd_rr_1_3; /* 450 int8_t cdd_rr_1_2; /* 455 int8_t cdd_rr_1_0; /* 460 int8_t cdd_rr_0_3; /* [all …]
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| H A D | mnpmusrammsgblock_lpddr4.h | 491 int8_t cdd_cha_rr_1_0; /* 497 int8_t cdd_cha_rr_0_1; /* 503 int8_t cdd_cha_rw_1_1; /* 509 int8_t cdd_cha_rw_1_0; /* 515 int8_t cdd_cha_rw_0_1; /* 521 int8_t cdd_cha_rw_0_0; /* 527 int8_t cdd_cha_wr_1_1; /* 533 int8_t cdd_cha_wr_1_0; /* 539 int8_t cdd_cha_wr_0_1; /* 545 int8_t cdd_cha_wr_0_0; /* [all …]
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| H A D | mnpmusrammsgblock_ddr4.h | 420 int8_t cdd_rr_3_2; /* 425 int8_t cdd_rr_3_1; /* 430 int8_t cdd_rr_3_0; /* 435 int8_t cdd_rr_2_3; /* 440 int8_t cdd_rr_2_1; /* 445 int8_t cdd_rr_2_0; /* 450 int8_t cdd_rr_1_3; /* 455 int8_t cdd_rr_1_2; /* 460 int8_t cdd_rr_1_0; /* 465 int8_t cdd_rr_0_3; /* [all …]
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| /rk3399_ARM-atf/drivers/nxp/ddr/phy-gen2/ |
| H A D | ddr4fw.h | 42 int8_t cdd_rr_3_2; 43 int8_t cdd_rr_3_1; 44 int8_t cdd_rr_3_0; 45 int8_t cdd_rr_2_3; 46 int8_t cdd_rr_2_1; 47 int8_t cdd_rr_2_0; 48 int8_t cdd_rr_1_3; 49 int8_t cdd_rr_1_2; 50 int8_t cdd_rr_1_0; 51 int8_t cdd_rr_0_3; [all …]
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| /rk3399_ARM-atf/plat/mediatek/mt8183/drivers/gpio/ |
| H A D | mtgpio.c | 224 assert(!((PULL_offset[pin].offset == (int8_t)-1) && in mt_set_gpio_pull_enable_chip() 225 (pupd_offset == (int8_t)-1))); in mt_set_gpio_pull_enable_chip() 228 if (PULL_offset[pin].offset == (int8_t)-1) in mt_set_gpio_pull_enable_chip() 234 if (PULL_offset[pin].offset == (int8_t)-1) { in mt_set_gpio_pull_enable_chip() 249 assert(!(pupd_offset == (int8_t)-1)); in mt_set_gpio_pull_enable_chip() 253 assert(!(pupd_offset == (int8_t)-1)); in mt_set_gpio_pull_enable_chip() 258 assert(!(pupd_offset == (int8_t)-1)); in mt_set_gpio_pull_enable_chip() 273 assert(!((PULL_offset[pin].offset == (int8_t)-1) && in mt_get_gpio_pull_enable_chip() 274 (pupd_offset == (int8_t)-1))); in mt_get_gpio_pull_enable_chip() 276 if (PULL_offset[pin].offset == (int8_t)-1) { in mt_get_gpio_pull_enable_chip() [all …]
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| H A D | mtgpio_cfg.h | 23 int8_t offset;
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| /rk3399_ARM-atf/common/ |
| H A D | uuid.c | 15 static int8_t hex_val(char hex) in hex_val() 17 int8_t val = 0; in hex_val() 20 val = (int8_t)(hex - '0'); in hex_val() 22 val = (int8_t)(hex - 'a' + 0xa); in hex_val() 24 val = (int8_t)(hex - 'A' + 0xa); in hex_val() 38 int8_t nibble; in read_hex()
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| /rk3399_ARM-atf/plat/rockchip/common/scmi/ |
| H A D | scmi_clock.h | 25 int8_t is_security; 26 int8_t is_dynamic_prate;
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| /rk3399_ARM-atf/drivers/renesas/common/ddr/ddr_b/ |
| H A D | boot_init_dram_config.c | 45 int8_t cacs_adj[16]; 46 int8_t dm_adj_w[SLICE_CNT]; 47 int8_t dq_adj_w[SLICE_CNT * 8]; 48 int8_t dm_adj_r[SLICE_CNT]; 49 int8_t dq_adj_r[SLICE_CNT * 8];
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| H A D | boot_init_dram.c | 1858 int8_t _adj; in ddr_config() 3303 int8_t _adj; in wdqdm_ana1() 3686 int8_t _adj; in rdqdm_ana1()
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| /rk3399_ARM-atf/plat/imx/common/include/sci/svc/misc/ |
| H A D | sci_misc_api.h | 499 sc_misc_temp_t temp, int16_t celsius, int8_t tenths); 517 int8_t *tenths);
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| /rk3399_ARM-atf/drivers/ti/ipc/ |
| H A D | mailbox.c | 37 static int8_t ti_mailbox_poll_rx_status(void) in ti_mailbox_poll_rx_status()
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| /rk3399_ARM-atf/include/lib/libc/ |
| H A D | stdint.h | 85 typedef signed char int8_t; typedef
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| /rk3399_ARM-atf/plat/imx/common/include/sci/ |
| H A D | sci_rpc.h | 71 int8_t i8[(SC_RPC_MAX_MSG - 1U) * 4U];
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| H A D | sci_types.h | 811 typedef __INT8_TYPE__ int8_t; typedef
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| /rk3399_ARM-atf/plat/imx/common/include/sci/svc/timer/ |
| H A D | sci_timer_api.h | 303 sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count);
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| /rk3399_ARM-atf/plat/imx/common/sci/svc/misc/ |
| H A D | misc_rpc_clnt.c | 430 sc_misc_temp_t temp, int16_t celsius, int8_t tenths) in sc_misc_set_temp() 441 RPC_I8(&msg, 5U) = (int8_t) tenths; in sc_misc_set_temp() 452 int8_t *tenths) in sc_misc_get_temp()
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| /rk3399_ARM-atf/plat/imx/imx8ulp/upower/ |
| H A D | upower_api.h | 520 int upwr_xcp_i2c_access(uint16_t addr, int8_t data_size, uint8_t subaddr_size,
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| H A D | upower_defs.h | 154 int8_t data_size;
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| H A D | upower_api.c | 1145 int8_t data_size, in upwr_xcp_i2c_access()
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| /rk3399_ARM-atf/plat/imx/common/sci/svc/timer/ |
| H A D | timer_rpc_clnt.c | 327 sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count) in sc_timer_set_rtc_calb() 335 RPC_I8(&msg, 0U) = (int8_t) count; in sc_timer_set_rtc_calb()
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| /rk3399_ARM-atf/plat/st/stm32mp1/ |
| H A D | stm32mp1_shared_resources.c | 109 static int8_t gpioz_nbpin = -1;
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| /rk3399_ARM-atf/include/drivers/ |
| H A D | ufs.h | 305 int8_t model[MAX_MODEL_LEN + 1];
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| /rk3399_ARM-atf/plat/rockchip/rk3588/drivers/pmu/ |
| H A D | pmu.c | 43 static int8_t pd_repair_map[] = { 307 int8_t pd_repair = pd_repair_map[pd]; in pmu_power_domain_st()
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| /rk3399_ARM-atf/tools/marvell/doimage/ |
| H A D | doimage.c | 156 int8_t key_index; /* For header signatures verification only */
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