Searched refs:input_freq (Results 1 – 2 of 2) sorted by relevance
1947 static int clk_compute_pll1_settings(unsigned long input_freq, in clk_compute_pll1_settings() argument1960 unsigned long post_divm = input_freq / divm; in clk_compute_pll1_settings()1976 divn = (freq / input_freq) - 1U; in clk_compute_pll1_settings()1981 frac = ((freq * FRAC_MAX) / input_freq) - ((divn + 1U) * FRAC_MAX); in clk_compute_pll1_settings()2034 unsigned long input_freq = 0UL; in clk_get_pll1_settings() local2041 input_freq = stm32mp_clk_get_rate(CK_HSI); in clk_get_pll1_settings()2044 input_freq = stm32mp_clk_get_rate(CK_HSE); in clk_get_pll1_settings()2050 if (input_freq == 0UL) { in clk_get_pll1_settings()2054 return clk_compute_pll1_settings(input_freq, freq_khz, pllcfg, fracv); in clk_get_pll1_settings()
1439 unsigned long input_freq = 0UL; in clk_compute_pll1_settings() local1445 input_freq = _clk_stm32_get_rate(priv, _CK_HSI); in clk_compute_pll1_settings()1448 input_freq = _clk_stm32_get_rate(priv, _CK_HSE); in clk_compute_pll1_settings()1454 if (input_freq == 0UL) { in clk_compute_pll1_settings()1463 unsigned long post_divm = input_freq / divm; in clk_compute_pll1_settings()1479 divn = (freq / input_freq) - 1U; in clk_compute_pll1_settings()1484 frac = ((freq * FRAC_MAX) / input_freq) - ((divn + 1U) * FRAC_MAX); in clk_compute_pll1_settings()