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Searched refs:align90 (Results 1 – 6 of 6) sorted by relevance

/rk3399_ARM-atf/plat/marvell/octeontx/otx2/t91/t9130/board/
H A Dphy-porting-layer.h24 .align90 = 0x5f,
35 .align90 = 0x5f,
52 .align90 = 0x5f,
64 .align90 = 0x5f,
81 .align90 = 0x5f,
92 .align90 = 0x5f,
125 .align90 = 0x61,
/rk3399_ARM-atf/plat/marvell/armada/a8k/a80x0/board/
H A Dphy-porting-layer.h22 .align90 = 0x5f,
31 .align90 = 0x5f,
46 .align90 = 0x5f,
55 .align90 = 0x5f,
86 .align90 = 0x61,
111 .align90 = 0x61,
142 .align90 = 0x61,
167 .align90 = 0x61,
/rk3399_ARM-atf/plat/marvell/armada/a8k/a70x0_mochabin/board/
H A Dphy-porting-layer.h25 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf, .align90 = 0x60,
51 .align90 = 0x61,
66 .align90 = 0x61,
/rk3399_ARM-atf/drivers/marvell/comphy/
H A Dphy-default-porting-layer.h19 .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf, .align90 = 0x5f,
39 .align90 = 0x61,
H A Dphy-comphy-cp110.h15 uint8_t align90; member
61 uint8_t align90; member
H A Dphy-comphy-cp110.c563 data = sata_static_values->align90 << HPIPE_OS_PH_OFFSET_OFFSET; in mvebu_cp110_comphy_sata_power_on()
1121 data = xfi_static_values->align90 << HPIPE_CAL_OS_PH_EXT_OFFSET; in mvebu_cp110_comphy_xfi_power_on()
2137 uint32_t g1_ffe_cap_sel, g1_ffe_res_sel, align90, g1_dfe_res; in mvebu_cp110_comphy_xfi_rx_training() local
2218 align90 = ((mmio_read_32(hpipe_addr + HPIPE_DATA_PHASE_OFF_CTRL_REG) in mvebu_cp110_comphy_xfi_rx_training()
2229 g1_ffe_res_sel, g1_ffe_cap_sel, align90, g1_dfe_res); in mvebu_cp110_comphy_xfi_rx_training()
2279 printf("\t.align90 = 0x%x,\n", align90); in mvebu_cp110_comphy_xfi_rx_training()