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Searched refs:SPM_DVFS_CMD5 (Results 1 – 10 of 10) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_pmic_wrap.c84 {(uint32_t)SPM_DVFS_CMD5, (uint32_t)SPM_DVFS_CMD5,}, in _mt_spm_pmic_table_init()
H A Dmt_spm_reg.h401 #define SPM_DVFS_CMD5 (SPM_BASE + 0x724) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_pmic_wrap.c89 { (uint32_t)SPM_DVFS_CMD5, (uint32_t)SPM_DVFS_CMD5, }, in _mt_spm_pmic_table_init()
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_pmic_wrap.c96 { (uint32_t)SPM_DVFS_CMD5, (uint32_t)SPM_DVFS_CMD5, }, in _mt_spm_pmic_table_init()
H A Dmt_spm_reg.h346 #define SPM_DVFS_CMD5 (SPM_BASE + 0x724) macro
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_pmic_wrap.c84 {(uint32_t)SPM_DVFS_CMD5, (uint32_t)SPM_DVFS_CMD5,}, in _mt_spm_pmic_table_init()
H A Dmt_spm_reg.h415 #define SPM_DVFS_CMD5 (SPM_BASE + 0x724) macro
/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/spm/
H A Dspm_pmic_wrap.c91 {(uint32_t)SPM_DVFS_CMD5, (uint32_t)SPM_DVFS_CMD5,}, in _mt_spm_pmic_table_init()
H A Dspm.h329 #define SPM_DVFS_CMD5 (SPM_BASE + 0x724) macro
/rk3399_ARM-atf/plat/mediatek/mt8188/include/
H A Dspm_reg.h351 #define SPM_DVFS_CMD5 (SPM_BASE + 0x724) macro