Searched refs:RCC_PLLNCR_PLLON (Results 1 – 4 of 4) sorted by relevance
1394 pll1->vco.status = RCC_PLLNCR_DIVPEN | RCC_PLLNCR_PLLON; in clk_compute_pll1_settings()1423 return ((mmio_read_32(pll_base) & RCC_PLLNCR_PLLON) != 0U); in _clk_stm32_pll_is_enabled()1432 RCC_PLLNCR_PLLON); in _clk_stm32_pll_set_on()1443 mmio_clrbits_32(pll_base, RCC_PLLNCR_PLLON); in _clk_stm32_pll_set_off()2208 vco->status = RCC_PLLNCR_DIVPEN | RCC_PLLNCR_DIVQEN | RCC_PLLNCR_DIVREN | RCC_PLLNCR_PLLON; in clk_stm32_load_vco_config()
1739 if (mmio_read_32(pllxcr) != RCC_PLLNCR_PLLON) { in stm32mp1_check_pll_conf()1804 RCC_PLLNCR_PLLON); in stm32mp1_pll_start()1839 mmio_clrbits_32(pllxcr, RCC_PLLNCR_PLLON); in stm32mp1_pll_stop()
1753 #define RCC_PLLNCR_PLLON BIT(0) macro
2279 #define RCC_PLLNCR_PLLON BIT(0) macro