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Searched refs:RCC_PLLNCFGR2_DIVX_MASK (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/include/drivers/st/
H A Dstm32mp13_rcc.h1772 #define RCC_PLLNCFGR2_DIVX_MASK GENMASK(6, 0) macro
H A Dstm32mp15_rcc.h2298 #define RCC_PLLNCFGR2_DIVX_MASK GENMASK(6, 0) macro
/rk3399_ARM-atf/drivers/st/clk/
H A Dstm32mp1_clk.c1094 divy = (cfgr2 >> pllncfgr2[div_id]) & RCC_PLLNCFGR2_DIVX_MASK; in stm32mp1_read_pll_freq()