Searched refs:PLAT_CORE_LVL (Results 1 – 2 of 2) sorted by relevance
218 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_OFF_STATE) { in _pwr_suspend()229 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend()299 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_OFF_STATE) { in _pwr_suspend_finish()311 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()376 state->pwr_domain_state[PLAT_CORE_LVL] = in _pwr_state_validate()379 state->pwr_domain_state[PLAT_CORE_LVL] = in _pwr_state_validate()400 req_state->pwr_domain_state[PLAT_CORE_LVL] = PLAT_MAX_OFF_STATE; in _pwr_state_sys_suspend()
17 #define PLAT_CORE_LVL PSCI_CPU_PWR_LVL macro