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Searched refs:LITTLE_CRU_BASE (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3576/drivers/pmu/
H A Dpm_pd_regs.c114 REG_REGION(0x300, 0x30c, 4, LITTLE_CRU_BASE, WMSK_VAL),
115 REG_REGION(0x800, 0x804, 4, LITTLE_CRU_BASE, WMSK_VAL),
116 REG_REGION(0xa00, 0xa0c, 4, LITTLE_CRU_BASE, WMSK_VAL),
117 REG_REGION(0xcc0, 0xcc0, 4, LITTLE_CRU_BASE, 0),
118 REG_REGION(0xf38, 0xf38, 8, LITTLE_CRU_BASE, 0),
119 REG_REGION(0xf3c, 0xf3c, 8, LITTLE_CRU_BASE, WMSK_VAL),
394 l_cru_mode = mmio_read_32(LITTLE_CRU_BASE + 0x280); in pd_core_save()
408 mmio_write_32(LITTLE_CRU_BASE + 0x280, 0x00030000); in pd_core_restore()
424 mmio_write_32(LITTLE_CRU_BASE + 0x280, WITH_16BITS_WMSK(l_cru_mode)); in pd_core_restore()
/rk3399_ARM-atf/plat/rockchip/rk3576/scmi/
H A Drk3576_clk.c439 mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(1), in clk_cpul_set_rate()
443 mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(0), in clk_cpul_set_rate()
449 mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(1), in clk_cpul_set_rate()
452 mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(0), in clk_cpul_set_rate()
459 mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(0), in clk_cpul_set_rate()
462 mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(0), in clk_cpul_set_rate()
465 mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(1), in clk_cpul_set_rate()
493 mode = mmio_read_32(LITTLE_CRU_BASE + CRU_MODE_CON) & in rk3576_lpll_get_rate()
532 src = mmio_read_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(1)) & 0x00c0; in clk_scmi_cpul_get_rate()
537 src = mmio_read_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(0)) & 0x3000; in clk_scmi_cpul_get_rate()
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/rk3399_ARM-atf/plat/rockchip/rk3576/
H A Drk3576_def.h65 #define LITTLE_CRU_BASE 0x27240000 macro