Lines Matching refs:LITTLE_CRU_BASE

439 		mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(1),  in clk_cpul_set_rate()
443 		mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(0),  in clk_cpul_set_rate()
449 		mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(1),  in clk_cpul_set_rate()
452 		mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(0),  in clk_cpul_set_rate()
459 	mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(0),  in clk_cpul_set_rate()
462 	mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(0),  in clk_cpul_set_rate()
465 	mmio_write_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(1),  in clk_cpul_set_rate()
493 	mode = mmio_read_32(LITTLE_CRU_BASE + CRU_MODE_CON) &  in rk3576_lpll_get_rate()
532 	src = mmio_read_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(1)) & 0x00c0;  in clk_scmi_cpul_get_rate()
537 	src = mmio_read_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(0)) & 0x3000;  in clk_scmi_cpul_get_rate()
539 	div = mmio_read_32(LITTLE_CRU_BASE + LCORE_CRU_CLKSEL_CON(6)) & 0x0f80;  in clk_scmi_cpul_get_rate()