Searched refs:FIREWALL_DDR_BASE (Results 1 – 7 of 7) sorted by relevance
| /rk3399_ARM-atf/plat/rockchip/rk3588/drivers/secure/ |
| H A D | secure.c | 20 mmio_write_32(FIREWALL_DDR_BASE + FIREWALL_DDR_MST(1), 0x0000ffff); in secure_fw_master_init()
22 mmio_write_32(FIREWALL_DDR_BASE + FIREWALL_DDR_MST(14), 0x00000000); in secure_fw_master_init()
26 mmio_write_32(FIREWALL_DDR_BASE + FIREWALL_DDR_MST(36), 0xffff0000); in secure_fw_master_init()
33 mmio_write_32(FIREWALL_DDR_BASE + FIREWALL_DDR_MST(i), 0xffffffff); in secure_fw_master_init()
85 mmio_write_32(FIREWALL_DDR_BASE + FIREWALL_DDR_RGN(rgn_id), in ddr_fw_rgn_config()
89 mmio_setbits_32(FIREWALL_DDR_BASE + FIREWALL_DDR_CON, in ddr_fw_rgn_config()
113 mmio_clrbits_32(FIREWALL_DDR_BASE + FIREWALL_DDR_CON, 0xfffe); in secure_region_init()
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| /rk3399_ARM-atf/plat/rockchip/rk3328/drivers/soc/ |
| H A D | soc.c | 44 MAP_REGION_FLAT(FIREWALL_DDR_BASE, FIREWALL_DDR_SIZE,
109 val = mmio_read_32(FIREWALL_DDR_BASE + in sgrf_init()
112 mmio_write_32(FIREWALL_DDR_BASE + in sgrf_init()
115 mmio_write_32(FIREWALL_DDR_BASE + in sgrf_init()
122 mmio_write_32(FIREWALL_DDR_BASE + FIREWALL_DDR_FW_DDR_RGN(0), 0x0); in sgrf_init()
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| /rk3399_ARM-atf/plat/rockchip/px30/drivers/secure/ |
| H A D | secure.c | 39 mmio_write_32(FIREWALL_DDR_BASE + in secure_ddr_region()
44 val = mmio_read_32(FIREWALL_DDR_BASE + FIREWALL_DDR_FW_DDR_CON_REG); in secure_ddr_region()
46 mmio_write_32(FIREWALL_DDR_BASE + in secure_ddr_region()
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| /rk3399_ARM-atf/plat/rockchip/rk3328/ |
| H A D | rk3328_def.h | 79 #define FIREWALL_DDR_BASE 0xff7c0000 macro
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| /rk3399_ARM-atf/plat/rockchip/px30/ |
| H A D | px30_def.h | 109 #define FIREWALL_DDR_BASE 0xff534000 macro
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| /rk3399_ARM-atf/plat/rockchip/rk3588/ |
| H A D | rk3588_def.h | 102 #define FIREWALL_DDR_BASE 0xfe030000 macro
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| /rk3399_ARM-atf/plat/rockchip/rk3576/ |
| H A D | rk3576_def.h | 93 #define FIREWALL_DDR_BASE 0x27f80000 macro
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