Searched refs:EFUSEC_BASE (Results 1 – 5 of 5) sorted by relevance
233 lvts_data->efuse[0] = mmio_read_32(EFUSEC_BASE + 0x01A4); in mt8189_get_calibration_data()234 lvts_data->efuse[1] = mmio_read_32(EFUSEC_BASE + 0x01A8); in mt8189_get_calibration_data()235 lvts_data->efuse[2] = mmio_read_32(EFUSEC_BASE + 0x01AC); in mt8189_get_calibration_data()236 lvts_data->efuse[3] = mmio_read_32(EFUSEC_BASE + 0x01B0); in mt8189_get_calibration_data()237 lvts_data->efuse[4] = mmio_read_32(EFUSEC_BASE + 0x01B4); in mt8189_get_calibration_data()238 lvts_data->efuse[5] = mmio_read_32(EFUSEC_BASE + 0x01B8); in mt8189_get_calibration_data()239 lvts_data->efuse[6] = mmio_read_32(EFUSEC_BASE + 0x01BC); in mt8189_get_calibration_data()240 lvts_data->efuse[7] = mmio_read_32(EFUSEC_BASE + 0x01C0); in mt8189_get_calibration_data()241 lvts_data->efuse[8] = mmio_read_32(EFUSEC_BASE + 0x01C4); in mt8189_get_calibration_data()242 lvts_data->efuse[9] = mmio_read_32(EFUSEC_BASE + 0x01C8); in mt8189_get_calibration_data()[all …]
234 #define EFUSEC_BASE (IO_PHYS + 0x01F10000) macro235 #define CHIP_ID_REG (EFUSEC_BASE + 0x7A0)236 #define CPU_SEG_ID_REG (EFUSEC_BASE + 0x7E0)
40 #define VCORE_VB_INFO0 (EFUSEC_BASE + 0xD24)41 #define VCORE_VB_INFO1 (EFUSEC_BASE + 0xD28)42 #define VCORE_VB_INFO2 (EFUSEC_BASE + 0xD84)
16 #define EFUSEC_BASE (IO_PHYS + 0x03260000) macro
12 #define SOC_VB_REG (EFUSEC_BASE + 0x580)