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Searched refs:DRVCTRL0_QSPI0_MISO_IO1 (Results 1 – 8 of 8) sorted by relevance

/rk3399_ARM-atf/drivers/renesas/rcar/pfc/H3/
H A Dpfc_init_h3_v1.c234 #define DRVCTRL0_QSPI0_MISO_IO1(x) ((uint32_t)(x) << 20U) macro
882 | DRVCTRL0_QSPI0_MISO_IO1(3) in pfc_init_h3_v1()
H A Dpfc_init_h3_v2.c236 #define DRVCTRL0_QSPI0_MISO_IO1(x) ((uint32_t)(x) << 20U) macro
915 | DRVCTRL0_QSPI0_MISO_IO1(3) in pfc_init_h3_v2()
/rk3399_ARM-atf/drivers/renesas/rzg/pfc/G2N/
H A Dpfc_init_g2n.c238 #define DRVCTRL0_QSPI0_MISO_IO1(x) ((uint32_t)(x) << 20U) macro
958 DRVCTRL0_QSPI0_MISO_IO1(3) | in pfc_init_g2n()
/rk3399_ARM-atf/drivers/renesas/rcar/pfc/M3N/
H A Dpfc_init_m3n.c238 #define DRVCTRL0_QSPI0_MISO_IO1(x) ((uint32_t)(x) << 20U) macro
917 | DRVCTRL0_QSPI0_MISO_IO1(3) in pfc_init_m3n()
/rk3399_ARM-atf/drivers/renesas/rzg/pfc/G2H/
H A Dpfc_init_g2h.c238 #define DRVCTRL0_QSPI0_MISO_IO1(x) ((uint32_t)(x) << 20U) macro
962 DRVCTRL0_QSPI0_MISO_IO1(3) | in pfc_init_g2h()
/rk3399_ARM-atf/drivers/renesas/rcar/pfc/M3/
H A Dpfc_init_m3.c239 #define DRVCTRL0_QSPI0_MISO_IO1(x) ((uint32_t)(x) << 20U) macro
1010 | DRVCTRL0_QSPI0_MISO_IO1(3) in pfc_init_m3()
/rk3399_ARM-atf/drivers/renesas/rzg/pfc/G2M/
H A Dpfc_init_g2m.c239 #define DRVCTRL0_QSPI0_MISO_IO1(x) ((uint32_t)(x) << 20U) macro
999 | DRVCTRL0_QSPI0_MISO_IO1(3) in pfc_init_g2m()
/rk3399_ARM-atf/drivers/renesas/rcar/pfc/D3/
H A Dpfc_init_d3.c239 #define DRVCTRL0_QSPI0_MISO_IO1(x) ((uint32_t)(x) << 20U) macro