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Searched refs:DDRGRF_CHA_CON (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3588/drivers/pmu/
H A Dpmu.c902 mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(0)); in ddr_sleep_config()
906 mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(1)); in ddr_sleep_config()
910 mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2)); in ddr_sleep_config()
914 mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2), 0x20002000); in ddr_sleep_config()
916 mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2), 0x08000000); in ddr_sleep_config()
918 mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(0), 0x00200020); in ddr_sleep_config()
920 mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(1), 0x00400040); in ddr_sleep_config()
926 mmio_read_32(DDR23GRF_BASE + DDRGRF_CHA_CON(0)); in ddr_sleep_config()
930 mmio_read_32(DDR23GRF_BASE + DDRGRF_CHA_CON(1)); in ddr_sleep_config()
934 mmio_read_32(DDR23GRF_BASE + DDRGRF_CHA_CON(2)); in ddr_sleep_config()
[all …]
/rk3399_ARM-atf/plat/rockchip/rk3588/drivers/soc/
H A Dsoc.h193 #define DDRGRF_CHA_CON(i) ((i) * 4) macro
/rk3399_ARM-atf/plat/rockchip/rk3576/drivers/soc/
H A Dsoc.h142 #define DDRGRF_CHA_CON(i) ((i) * 4) macro
/rk3399_ARM-atf/plat/rockchip/rk3576/drivers/pmu/
H A Dpmu.c583 mmio_read_32(DDR_GRF_BASE + DDRGRF_CHA_CON(2)); in ddr_sleep_config()
587 mmio_write_32(DDR_GRF_BASE + DDRGRF_CHA_CON(2), 0x0a000a00); in ddr_sleep_config()
593 mmio_write_32(DDR_GRF_BASE + DDRGRF_CHA_CON(2), in ddr_sleep_config_restore()