902 			mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(0));  in ddr_sleep_config()
906 			mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(1));  in ddr_sleep_config()
910 			mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2));  in ddr_sleep_config()
914 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2), 0x20002000);  in ddr_sleep_config()
916 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2), 0x08000000);  in ddr_sleep_config()
918 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(0), 0x00200020);  in ddr_sleep_config()
920 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(1), 0x00400040);  in ddr_sleep_config()
926 			mmio_read_32(DDR23GRF_BASE + DDRGRF_CHA_CON(0));  in ddr_sleep_config()
930 			mmio_read_32(DDR23GRF_BASE + DDRGRF_CHA_CON(1));  in ddr_sleep_config()
934 			mmio_read_32(DDR23GRF_BASE + DDRGRF_CHA_CON(2));  in ddr_sleep_config()
938 		mmio_write_32(DDR23GRF_BASE + DDRGRF_CHA_CON(2), 0x20002000);  in ddr_sleep_config()
940 		mmio_write_32(DDR23GRF_BASE + DDRGRF_CHA_CON(2), 0x08000000);  in ddr_sleep_config()
942 		mmio_write_32(DDR23GRF_BASE + DDRGRF_CHA_CON(0), 0x00200020);  in ddr_sleep_config()
944 		mmio_write_32(DDR23GRF_BASE + DDRGRF_CHA_CON(1), 0x00400040);  in ddr_sleep_config()
965 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(1),  in ddr_sleep_config_restore()
969 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(0),  in ddr_sleep_config_restore()
973 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2),  in ddr_sleep_config_restore()
980 		mmio_write_32(DDR23GRF_BASE + DDRGRF_CHA_CON(1),  in ddr_sleep_config_restore()
984 		mmio_write_32(DDR23GRF_BASE + DDRGRF_CHA_CON(0),  in ddr_sleep_config_restore()
988 		mmio_write_32(DDR23GRF_BASE + DDRGRF_CHA_CON(2),  in ddr_sleep_config_restore()