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Searched refs:CPG_FRQCRD (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/drivers/renesas/common/ddr/ddr_b/
H A Dboot_init_dram_regdef.h44 #define CPG_FRQCRD (CPG_BASE + 0x00E4U) macro
H A Dboot_init_dram.c400 data_l = 0x00030003 | (0xFF80FF80 & mmio_read_32(CPG_FRQCRD)); in pll3_control()
401 cpg_write_32(CPG_FRQCRD, data_l); in pll3_control()
420 data_l = (0xFF80FF80 & mmio_read_32(CPG_FRQCRD)); in pll3_control()
421 cpg_write_32(CPG_FRQCRD, data_l); in pll3_control()
440 (mmio_read_32(CPG_FRQCRD) & 0xFF80FF80); in pll3_control()
441 cpg_write_32(CPG_FRQCRD, data_l); in pll3_control()
467 (mmio_read_32(CPG_FRQCRD) & 0xFF80FF80); in pll3_control()
468 cpg_write_32(CPG_FRQCRD, data_l); in pll3_control()
/rk3399_ARM-atf/drivers/renesas/common/
H A Dddr_regs.h252 #define CPG_FRQCRD (CPG_BASE + 0x00E4U) macro