Searched refs:COMPHY_TRX_TRAIN_CTRL_REG_0_OFFS (Results 1 – 1 of 1) sorted by relevance
54 #define COMPHY_TRX_TRAIN_CTRL_REG_0_OFFS 0x120a2c macro96 x5 = x1 + COMPHY_TRX_TRAIN_CTRL_REG_0_OFFS; in mrvl_sip_smc_handler()