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Searched refs:CLKMGR_PLLGLOB_DREFCLKDIV_OFFSET (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_clock_manager.h291 #define CLKMGR_PLLGLOB_DREFCLKDIV_OFFSET 12 macro
/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_clock_manager.c108 CLKMGR_PLLGLOB_DREFCLKDIV_OFFSET); in calc_pll_vcocalibration()