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Searched refs:ARM_PWR_LVL0 (Results 1 – 12 of 12) sorted by relevance

/rk3399_ARM-atf/plat/arm/board/fvp/
H A Dfvp_pm.c33 ARM_PWR_LVL0, PSTATE_TYPE_STANDBY),
36 ARM_PWR_LVL0, PSTATE_TYPE_POWERDOWN),
78 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_power_domain_on_finish_common()
174 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_off()
204 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_suspend()
208 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_suspend()
273 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_suspend_finish()
324 if (power_level == ARM_PWR_LVL0) { in fvp_node_hw_state()
350 for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++) in fvp_get_sys_suspend_power_state()
/rk3399_ARM-atf/plat/arm/common/
H A Darm_pm.c42 if (pwr_lvl != ARM_PWR_LVL0) in arm_validate_power_state()
45 req_state->pwr_domain_state[ARM_PWR_LVL0] = in arm_validate_power_state()
48 for (i = ARM_PWR_LVL0; i <= pwr_lvl; i++) in arm_validate_power_state()
99 for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++) { in arm_validate_power_state()
/rk3399_ARM-atf/drivers/arm/css/scp/
H A Dcss_pm_scpi.c83 if (power_level != ARM_PWR_LVL0 && power_level != ARM_PWR_LVL1) in css_scp_get_power_state()
92 if (power_level == ARM_PWR_LVL0) { in css_scp_get_power_state()
H A Dcss_pm_scmi.c133 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in css_scp_suspend()
159 SCMI_SET_PWR_STATE_LVL(scmi_pwr_state, ARM_PWR_LVL0, in css_scp_suspend()
202 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in css_scp_off()
/rk3399_ARM-atf/plat/arm/css/common/
H A Dcss_pm.c36 ARM_LOCAL_STATE_RET, ARM_PWR_LVL0, PSTATE_TYPE_STANDBY),
39 ARM_LOCAL_STATE_OFF, ARM_PWR_LVL0, PSTATE_TYPE_POWERDOWN),
262 for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++) in css_get_sys_suspend_power_state()
/rk3399_ARM-atf/include/plat/arm/css/common/
H A Dcss_pm.h19 #define CSS_CORE_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL0]
/rk3399_ARM-atf/plat/arm/board/corstone700/common/include/
H A Dplatform_def.h145 #define ARM_PWR_LVL0 MPIDR_AFFLVL0 macro
/rk3399_ARM-atf/plat/nuvoton/npcm845x/
H A Dnpcm845x_psci.c306 for (i = ARM_PWR_LVL0; (uint64_t)i <= PLAT_MAX_PWR_LVL; i++) { in npcm845x_get_sys_suspend_power_state()
/rk3399_ARM-atf/plat/arm/board/corstone1000/common/include/
H A Dplatform_def.h250 #define ARM_PWR_LVL0 MPIDR_AFFLVL0 macro
/rk3399_ARM-atf/include/plat/nuvoton/common/
H A Dnpcm845x_arm_def.h50 #define ARM_PWR_LVL0 MPIDR_AFFLVL0 macro
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd3/
H A Dnrd_plat_arm_def3.h181 #define ARM_PWR_LVL0 MPIDR_AFFLVL0 macro
/rk3399_ARM-atf/include/plat/arm/common/
H A Darm_def.h34 #define ARM_PWR_LVL0 MPIDR_AFFLVL0 macro