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Searched refs:gck (Results 1 – 3 of 3) sorted by relevance

/optee_os/core/drivers/clk/sam/
H A Dat91_generated.c33 struct clk_generated *gck = clk->priv; in clk_generated_enable() local
35 io_write32(gck->base + gck->layout->offset, in clk_generated_enable()
36 (gck->id & gck->layout->pid_mask)); in clk_generated_enable()
37 io_clrsetbits32(gck->base + gck->layout->offset, in clk_generated_enable()
38 AT91_PMC_PCR_GCKDIV_MASK | gck->layout->gckcss_mask | in clk_generated_enable()
39 gck->layout->cmd | AT91_PMC_PCR_GCKEN, in clk_generated_enable()
40 field_prep(gck->layout->gckcss_mask, gck->parent_id) | in clk_generated_enable()
41 gck->layout->cmd | in clk_generated_enable()
42 ((gck->gckdiv << AT91_PMC_PCR_GCKDIV_SHIFT) & in clk_generated_enable()
51 struct clk_generated *gck = clk->priv; in clk_generated_disable() local
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H A Dsama7g5_clk.c1536 const struct sama7g5_gck *gck = sama7g5_gcks + i; in pmc_setup_sama7g5() local
1537 uint8_t num_parents = 3 + gck->parents_count; in pmc_setup_sama7g5()
1546 for (j = 0; j < gck->parents_count; j++) { in pmc_setup_sama7g5()
1549 gck->parents[j]); in pmc_setup_sama7g5()
1551 mux_table[3 + j] = gck->parents_mux_table[j]; in pmc_setup_sama7g5()
1556 gck->name, parents, in pmc_setup_sama7g5()
1558 num_parents, gck->id, in pmc_setup_sama7g5()
1559 &gck->output, in pmc_setup_sama7g5()
1560 gck->parents_chg_id); in pmc_setup_sama7g5()
1566 pmc_clk->id = gck->id; in pmc_setup_sama7g5()
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/optee_os/core/arch/arm/dts/
H A Dsama5d2.dtsi259 clock-names = "hclock", "iscck", "gck";