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Searched refs:divm (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/drivers/clk/
H A Dclk-stm32mp15.c681 uint32_t divm = 0; in stm32mp1_pll_get_fvco() local
687 divm = (cfgr1 & RCC_PLLNCFGR1_DIVM_MASK) >> RCC_PLLNCFGR1_DIVM_SHIFT; in stm32mp1_pll_get_fvco()
706 denominator = ((unsigned long long)divm + 1U) << 13; in stm32mp1_pll_get_fvco()
709 fvco = (unsigned long)(refclk * (divn + 1U) / (divm + 1U)); in stm32mp1_pll_get_fvco()
H A Dclk-stm32mp13.c1085 uint32_t divm = vco->div_mn[PLL_CFG_M]; in clk_stm32_pll_compute_cfgr1() local
1089 refclk = clk_stm32_pll_get_oscillator_rate(sel) / (divm + 1U); in clk_stm32_pll_compute_cfgr1()
1101 *value |= (divm << RCC_PLLNCFGR1_DIVM_SHIFT) & RCC_PLLNCFGR1_DIVM_MASK; in clk_stm32_pll_compute_cfgr1()
1720 uint32_t divm = 0; in clk_stm32_pll_get_rate() local
1727 divm = (cfgr1 & (RCC_PLLNCFGR1_DIVM_MASK)) >> RCC_PLLNCFGR1_DIVM_SHIFT; in clk_stm32_pll_get_rate()
1744 denominator = ((unsigned long long)divm + 1U) << 13; in clk_stm32_pll_get_rate()
1747 fvco = (unsigned long)(prate * (divn + 1U) / (divm + 1U)); in clk_stm32_pll_get_rate()