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Searched refs:clk_set_rate (Results 1 – 7 of 7) sorted by relevance

/optee_os/core/drivers/
H A Dmicrochip_pit.c48 res = clk_set_rate(gclk, MCHP_PIT64B_FREQ); in microchip_pit_probe()
H A Dstm32_cpu_opp.c81 return clk_set_rate(cpu_opp.clock, cpu_opp.dvfs[opp].freq_khz * 1000); in set_opp_clk_rate()
/optee_os/core/include/drivers/
H A Dclk.h150 TEE_Result clk_set_rate(struct clk *clk, unsigned long rate);
/optee_os/core/drivers/scmi-msg/
H A Dclock_generic.c124 res = clk_set_rate(clk->clk, rate); in plat_scmi_clock_set_rate()
/optee_os/core/drivers/clk/
H A Dclk_dt.c176 if (rate && clk_set_rate(clk, rate) != TEE_SUCCESS) in parse_assigned_clock()
H A Dclk.c249 TEE_Result clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
/optee_os/core/drivers/clk/sam/
H A Dsama7g5_clk.c1571 res = clk_set_rate(pll_frac_clk[PLL_ID_ETH], 625000000); in pmc_setup_sama7g5()
1575 res = clk_set_rate(pll_div_clk[PLL_ID_ETH], 625000000); in pmc_setup_sama7g5()
1579 res = clk_set_rate(pll_frac_clk[PLL_ID_AUDIO], 983040000); in pmc_setup_sama7g5()
1583 res = clk_set_rate(pll_div_clk[PLL_ID_AUDIO], 196608000); in pmc_setup_sama7g5()