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Searched refs:MUX_SAI2 (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp13-clksrc.h112 #define MUX_SAI2 29 macro
299 #define CLK_SAI2_PLL4Q CLKSRC(MUX_SAI2, 0)
300 #define CLK_SAI2_PLL3Q CLKSRC(MUX_SAI2, 1)
301 #define CLK_SAI2_I2SCKIN CLKSRC(MUX_SAI2, 2)
302 #define CLK_SAI2_CKPER CLKSRC(MUX_SAI2, 3)
303 #define CLK_SAI2_SPDIF CLKSRC(MUX_SAI2, 4)
304 #define CLK_SAI2_PLL3R CLKSRC(MUX_SAI2, 5)
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c485 MUX_CFG(MUX_SAI2, RCC_SAI2CKSELR, 0, 3),
2378 0, GATE_SAI2, MUX_SAI2);