Home
last modified time | relevance | path

Searched refs:MUX_RNG1 (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp13-clksrc.h109 #define MUX_RNG1 26 macro
356 #define CLK_RNG1_CSI CLKSRC(MUX_RNG1, 0)
357 #define CLK_RNG1_PLL4R CLKSRC(MUX_RNG1, 1)
358 #define CLK_RNG1_LSE CLKSRC(MUX_RNG1, 2)
359 #define CLK_RNG1_LSI CLKSRC(MUX_RNG1, 3)
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c481 MUX_CFG(MUX_RNG1, RCC_RNG1CKSELR, 0, 2),
2299 0, GATE_RNG1, MUX_RNG1);