Searched refs:MUX_PLL12 (Results 1 – 2 of 2) sorted by relevance
| /optee_os/core/include/dt-bindings/clock/ |
| H A D | stm32mp13-clksrc.h | 86 #define MUX_PLL12 3 macro
148 #define CLK_PLL12_HSI CLKSRC(MUX_PLL12, 0)
149 #define CLK_PLL12_HSE CLKSRC(MUX_PLL12, 1)
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| /optee_os/core/drivers/clk/ |
| H A D | clk-stm32mp13.c | 459 MUXRDY_CFG(MUX_PLL12, RCC_RCK12SELR, 0, 2, GATE_PLL12SRCRDY),
916 CLK_PLL_CFG(PLL1_ID, PLL_2000, GATE_PLL1, MUX_PLL12, RCC_PLL1CR),
917 CLK_PLL_CFG(PLL2_ID, PLL_1600, GATE_PLL2, MUX_PLL12, RCC_PLL2CR),
2059 .mux_id = MUX_PLL12,
2097 0, RCC_PLL2CR, GATE_PLL2, MUX_PLL12);
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