Home
last modified time | relevance | path

Searched refs:MC_SCR_REGISTER (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/arch/arm/plat-marvell/armada7k8k/
H A Dhal_sec_perf.c137 register_phys_mem_pgdir(MEM_AREA_IO_SEC, MC_SCR_REGISTER, CORE_MMU_PGDIR_SIZE);
278 tmp = io_read32(PHY_2_VIR(MC_SCR_REGISTER)); in init_sec_perf()
280 io_write32(PHY_2_VIR(MC_SCR_REGISTER), tmp); in init_sec_perf()
/optee_os/core/arch/arm/plat-marvell/
H A Dplatform_config.h78 #define MC_SCR_REGISTER 0xF06F0204 macro