| /optee_os/core/arch/arm/plat-hikey/ |
| H A D | spi_test.c | 39 DMSG("pl022 busy - do NOT set CS!"); in spi_cs_callback() 42 DMSG("pl022 done - set CS!"); in spi_cs_callback() 54 DMSG("Configure gpio6 pin2 as SPI"); in spi_set_cs_mux() 57 DMSG("Configure gpio6 pin2 as GPIO"); in spi_set_cs_mux() 63 DMSG("gpio6 pin2 is SPI"); in spi_set_cs_mux() 65 DMSG("gpio6 pin2 is GPIO"); in spi_set_cs_mux() 80 DMSG("Set CS callback"); in spi_test_with_manual_cs_control() 83 DMSG("spi_base: 0x%" PRIxVA, spi_base); in spi_test_with_manual_cs_control() 84 DMSG("Configure SPI"); in spi_test_with_manual_cs_control() 104 DMSG("SPI test loop: %zu", j); in spi_test_with_manual_cs_control() [all …]
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| H A D | main.c | 63 DMSG("take SPI0 out of reset"); in spi_init() 70 DMSG("PERI_SC_PERIPH_RSTDIS3: 0x%x", in spi_init() 80 DMSG("PERI_SC_PERIPH_RSTSTAT3: 0x%x", read_val); in spi_init() 82 DMSG("enable SPI clock"); in spi_init() 89 DMSG("PERI_SC_PERIPH_CLKEN3: 0x%x", in spi_init() 92 DMSG("PERI_SC_PERIPH_CLKSTAT3: 0x%x", in spi_init() 104 DMSG("configure gpio6 pins 0-3 as SPI"); in spi_init() 110 DMSG("configure gpio6 pins 0-3 as nopull"); in spi_init() 127 DMSG("enable LD021_1V8 source (pin 35) on LS connector"); in peripherals_init()
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| /optee_os/core/arch/arm/plat-sunxi/ |
| H A D | psci.c | 92 DMSG("set entry address for CPU %d", core_idx); in psci_cpu_on() 96 DMSG("assert reset on target CPU %d", core_idx); in psci_cpu_on() 100 DMSG("invalidate L1 cache for CPU %d", core_idx); in psci_cpu_on() 104 DMSG("lock CPU %d", core_idx); in psci_cpu_on() 108 DMSG("release clamp for CPU %d", core_idx); in psci_cpu_on() 117 DMSG("clear power gating for CPU %d", core_idx); in psci_cpu_on() 122 DMSG("de-assert reset on target CPU %d", core_idx); in psci_cpu_on() 126 DMSG("unlock CPU %d", core_idx); in psci_cpu_on() 143 DMSG("core_id: %" PRIu32, core_id); in psci_cpu_off() 153 DMSG("set power gating for cpu %d", core_id); in psci_cpu_off() [all …]
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| H A D | main.c | 106 DMSG("SMTA_DECPORT0=%x", io_read32(v + REG_TZPC_SMTA_DECPORT0_STA_REG)); in tzpc_init() 107 DMSG("SMTA_DECPORT1=%x", io_read32(v + REG_TZPC_SMTA_DECPORT1_STA_REG)); in tzpc_init() 108 DMSG("SMTA_DECPORT2=%x", io_read32(v + REG_TZPC_SMTA_DECPORT2_STA_REG)); in tzpc_init() 115 DMSG("SMTA_DECPORT0=%x", io_read32(v + REG_TZPC_SMTA_DECPORT0_STA_REG)); in tzpc_init() 116 DMSG("SMTA_DECPORT1=%x", io_read32(v + REG_TZPC_SMTA_DECPORT1_STA_REG)); in tzpc_init() 117 DMSG("SMTA_DECPORT2=%x", io_read32(v + REG_TZPC_SMTA_DECPORT2_STA_REG)); in tzpc_init()
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| /optee_os/core/drivers/ |
| H A D | pl022_spi.c | 232 DMSG("Expected: 0x 22 10 ?4 00"); in pl022_print_peri_id() 233 DMSG("Read: 0x %02x %02x %02x %02x", in pl022_print_peri_id() 242 DMSG("Expected: 0x 0d f0 05 b1"); in pl022_print_cell_id() 243 DMSG("Read: 0x %02x %02x %02x %02x", in pl022_print_cell_id() 272 DMSG("SSPB2BTRANS: Expected: 0x2. Read: 0x%x", in pl022_sanity_check() 292 DMSG("pl022 busy - do NOT set CS!"); in pl022_control_cs() 295 DMSG("pl022 done - set CS!"); in pl022_control_cs() 344 DMSG("speed: requested: %u, closest1: %u", in pl022_calc_clk_divisors() 349 DMSG("speed: requested: %u, closest2: %u", in pl022_calc_clk_divisors() 352 DMSG("CPSDVR: %u (0x%x), SCR: %u (0x%x)", in pl022_calc_clk_divisors() [all …]
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| H A D | tzc380.c | 336 DMSG("TZC380 configuration:"); in tzc_dump_state() 337 DMSG("security_inversion_en %x", in tzc_dump_state() 344 DMSG(""); in tzc_dump_state() 345 DMSG("region %d", n); in tzc_dump_state() 348 DMSG("region_base: 0x%08x%08x", temp_32reg_h, temp_32reg); in tzc_dump_state() 350 DMSG("region sp: %x", temp_32reg >> TZC_ATTR_SP_SHIFT); in tzc_dump_state() 351 DMSG("region size: %x", (temp_32reg & TZC_REGION_SIZE_MASK) >> in tzc_dump_state() 354 DMSG("Lockdown select: %"PRIx32, in tzc_dump_state() 356 DMSG("Lockdown range: %"PRIx32, in tzc_dump_state() 358 DMSG("Action register: %"PRIx32, tzc_get_action()); in tzc_dump_state() [all …]
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| H A D | stm32_cpu_opp.c | 221 DMSG("Set OPP to %ukHz", level); in stm32_cpu_opp_set_level() 278 DMSG("Can't find property opp-supported-hw"); in stm32_cpu_opp_is_supported() 284 DMSG("Not supported opp-supported-hw %#"PRIx32, opp); in stm32_cpu_opp_is_supported() 304 DMSG("Resume to OPP %u", opp); in cpu_opp_pm() 367 DMSG("Skip SoC OPP %"PRIu64"kHz/%"PRIu32"uV", in stm32_cpu_opp_get_dt_subnode() 375 DMSG("Skip volt OPP %"PRIu64"kHz/%"PRIu32"uV", in stm32_cpu_opp_get_dt_subnode() 391 DMSG("Found OPP %u (%"PRIu64"kHz/%"PRIu32"uV) from DT", in stm32_cpu_opp_get_dt_subnode() 415 DMSG("Set OPP to %"PRIu64"kHz", freq_khz_opp_def); in stm32_cpu_opp_get_dt_subnode() 451 DMSG("No CPU operating points"); in stm32_cpu_init()
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| H A D | ls_sfp.c | 161 DMSG("Set GPIO %"PRIu32" pin %"PRIu32" to HIGH", in ls_sfp_program_fuses() 188 DMSG("Set GPIO %"PRIu8" pin %"PRIu32" to LOW", in ls_sfp_program_fuses() 202 DMSG("Programmed fuse successfully"); in ls_sfp_program_fuses() 289 DMSG("Index greater or equal to ouid: %"PRIu32" >= %zu", in ls_sfp_get_ouid() 326 DMSG("Index greater or equal to srkhr: %"PRIu32" >= %zu", in ls_sfp_get_srkh() 350 DMSG("Debug level has already been fused"); in ls_sfp_set_debug_level() 370 DMSG("SFP is already fused"); in ls_sfp_set_its_wp() 388 DMSG("Index greater or equal to ouid: %"PRIu32" >= %"PRIu32, in ls_sfp_set_ouid()
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| H A D | imx_wdog.c | 70 DMSG("val %x", val); in imx_wdog_restart() 121 DMSG("Wdog found at %u", off); in imx_wdog_base() 130 DMSG("%s not found in DTB", dt_wdog_match_table[i]); in imx_wdog_base()
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| /optee_os/core/pta/bcm/ |
| H A D | bnxt.c | 82 DMSG("bad parameters types: 0x%" PRIx32, types); in copy_bnxt_crash_dump() 105 DMSG("command entry point[%d] for \"%s\"", cmd_id, BNXT_TA_NAME); in invoke_command() 109 DMSG("bnxt fastboot"); in invoke_command() 114 DMSG("bnxt health status"); in invoke_command() 117 DMSG("bnxt handshake status"); in invoke_command() 120 DMSG("bnxt copy crash dump data"); in invoke_command() 123 DMSG("cmd: %d Not supported %s", cmd_id, BNXT_TA_NAME); in invoke_command()
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| H A D | sotp.c | 32 DMSG("close entry point for \"%s\"", SOTP_TA_NAME); in close_session() 74 DMSG("command entry point[%d] for \"%s\"", cmd_id, SOTP_TA_NAME); in invoke_command() 77 DMSG("bcm sotp pta access disabled"); in invoke_command()
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| /optee_os/core/pta/k3/ |
| H A D | otp.c | 33 DMSG("Written the value: 0x%08"PRIx32, params[1].value.a); in write_otp_row() 56 DMSG("Got the value: 0x%08"PRIx32, params[1].value.a); in read_otp_mmr() 84 DMSG("hw_write_lock: 0x%#x", hw_write_lock); in lock_otp_row() 85 DMSG("hw_read_lock: 0x%#x", hw_read_lock); in lock_otp_row() 86 DMSG("soft_lock: 0x%#x", soft_lock); in lock_otp_row() 94 DMSG("Locked the row: 0x%08"PRIx32, params[1].value.a); in lock_otp_row()
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| /optee_os/core/kernel/ |
| H A D | transfer_list.c | 96 DMSG("Dump transfer list:"); in transfer_list_dump() 97 DMSG("signature %#"PRIx32, tl->signature); in transfer_list_dump() 98 DMSG("checksum %#"PRIx8, tl->checksum); in transfer_list_dump() 99 DMSG("version %#"PRIx8, tl->version); in transfer_list_dump() 100 DMSG("hdr_size %#"PRIx8, tl->hdr_size); in transfer_list_dump() 101 DMSG("alignment %#"PRIx8, tl->alignment); in transfer_list_dump() 102 DMSG("size %#"PRIx32, tl->size); in transfer_list_dump() 103 DMSG("max_size %#"PRIx32, tl->max_size); in transfer_list_dump() 104 DMSG("flags %#"PRIx32, tl->flags); in transfer_list_dump() 110 DMSG("Entry %d:", i++); in transfer_list_dump() [all …]
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| H A D | boot.c | 146 DMSG("Non-secure memory found in manifest DT"); in discover_nsec_memory() 151 DMSG("No non-secure memory found in manifest DT"); in discover_nsec_memory() 158 DMSG("Non-secure memory found in extern DT"); in discover_nsec_memory() 163 DMSG("No non-secure memory found in external DT"); in discover_nsec_memory() 170 DMSG("Non-secure memory found in embedded DT"); in discover_nsec_memory() 175 DMSG("No non-secure memory found in embedded DT"); in discover_nsec_memory() 194 DMSG("Warning register_dynamic_shm() is deprecated, " in discover_nsec_memory() 223 DMSG("No SHM configured"); in mark_static_shm_as_reserved()
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| H A D | dt_driver.c | 138 DMSG("Failed to find provider cells: %d on node %s", in dt_driver_register_provider() 145 DMSG("Failed to find provider phandle on node %s", in dt_driver_register_provider() 327 DMSG("Corrupted node %s", prop_name); in dt_driver_device_from_node_idx_prop_phandle() 330 DMSG("Property %s missing in node %s", prop_name, in dt_driver_device_from_node_idx_prop_phandle() 369 DMSG("Property %s missing in node %s", prop_name, in dt_driver_device_from_node_idx_prop() 418 DMSG("Can't find node for phandle %"PRIu32, in dt_driver_device_from_node_idx_prop() 426 DMSG("Can't find cells count on node %s: %d", in dt_driver_device_from_node_idx_prop() 461 DMSG("Probe list: %u elements", count); in print_probe_list() 463 DMSG("|- Driver %s probes on node %s", in print_probe_list() 467 DMSG("`- Probe list end"); in print_probe_list() [all …]
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| /optee_os/core/tests/ |
| H A D | notif_test_wd.c | 46 DMSG("WD %"PRIu16" call_count %u, timeout_count %u", in test_wd_callback() 49 DMSG("WD call_count %u, timeout_count %u", in test_wd_callback() 85 DMSG("Clearing pending"); in wd_ndrv_yielding_cb() 136 DMSG("seconds %"PRIu32" millis %"PRIu32" count %u", in periodic_callback() 140 DMSG("Disabling periodic callout"); in periodic_callback() 155 DMSG("Adding a periodic callout"); in nex_init_periodic_callback()
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| H A D | ftmn_boot_tests.c | 191 DMSG("Calling " #x "()"); \ 193 DMSG("Return from " #x "()"); \ 202 DMSG("*************************************************"); in ftmn_boot_tests() 203 DMSG("************** Tests complete *****************"); in ftmn_boot_tests() 204 DMSG("*************************************************"); in ftmn_boot_tests()
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| /optee_os/core/drivers/scmi-msg/ |
| H A D | smt.c | 79 DMSG("Invalid channel ID %u", channel_id); in scmi_entry_smt() 85 DMSG("No shared buffer for channel ID %u", channel_id); in scmi_entry_smt() 90 DMSG("SCMI channel %u busy", channel_id); in scmi_entry_smt() 100 DMSG("SCMI payload too big %zu", in_payload_size); in scmi_entry_smt() 105 DMSG("SCMI channel bad status 0x%x", in scmi_entry_smt() 135 DMSG("SCMI error"); in scmi_entry_smt()
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| H A D | shm_msg.c | 53 DMSG("Invalid channel ID %u", channel_id); in scmi_entry_msg() 64 DMSG("Invalid SCMI buffer references %zu@%p / %zu@%p", in scmi_entry_msg() 70 DMSG("SCMI channel %u busy", channel_id); in scmi_entry_msg()
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| /optee_os/core/pta/veraison_attestation/ |
| H A D | veraison_attestation.c | 91 DMSG("Failed to encode measurement_value to base64"); in cmd_get_cbor_evidence() 94 DMSG("b64_measurement_value: %s", b64_measurement_value); in cmd_get_cbor_evidence() 112 DMSG("Failed to encode evidence to CBOR"); in cmd_get_cbor_evidence() 119 DMSG("Failed to encode CBOR to COSE"); in cmd_get_cbor_evidence()
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| /optee_os/core/arch/arm/plat-vexpress/ |
| H A D | main.c | 119 DMSG("got 0x%x", ch); in read_console() 158 DMSG("Asynchronous notifications started, event %d (vm %#"PRIx16")", in atomic_console_notif() 162 DMSG("Shutting down partition, event %d (vm %#"PRIx16")", in atomic_console_notif() 187 DMSG("Asynchronous notifications stopped"); in yielding_console_notif() 244 DMSG("Initializing TZC400"); in init_tzc400() 293 DMSG("core pos: %zu: ns_entry %#" PRIx32, pos, entry); in psci_cpu_on()
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| /optee_os/core/pta/tests/ |
| H A D | invoke.c | 179 DMSG("expect memref params: %p/%zu - %p/%zu - %p/%zu - %p/%zu", in test_entry_params() 260 DMSG("bad parameter types"); in test_inject_sdp() 271 DMSG("bad memref secure attribute"); in test_inject_sdp() 303 DMSG("bad parameter types"); in test_transform_sdp() 308 DMSG("bad memref secure attribute"); in test_transform_sdp() 342 DMSG("bad parameter types"); in test_dump_sdp() 353 DMSG("bad memref secure attribute"); in test_dump_sdp() 381 DMSG("create entry point for pseudo TA \"%s\"", TA_NAME); in create_ta() 387 DMSG("destroy entry point for pseudo ta \"%s\"", TA_NAME); in destroy_ta() 394 DMSG("open entry point for pseudo ta \"%s\"", TA_NAME); in open_session() [all …]
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| H A D | lockdep.c | 22 DMSG(""); in self_test_lockdep1() 83 DMSG(""); in self_test_lockdep2() 136 DMSG(""); in self_test_lockdep3() 196 DMSG("count=%d", count); in core_lockdep_tests()
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| /optee_os/core/arch/arm/plat-marvell/armada3700/ |
| H A D | hal_sec_perf.c | 216 DMSG("Range Num%" PRIu32 in _dump_range() 219 DMSG("AddrL: 0x%08" PRIx32, addr_read); in _dump_range() 220 DMSG("Size: %" PRIu32 "M", (0x1 << sizecode_read)); in _dump_range() 221 DMSG("Perm: %" PRIu32, perm_read); in _dump_range() 251 DMSG("sec-rgn size: ra = 0x%" PRIx32 ", size = 0x%" PRIx64, in init_sec_perf()
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| /optee_os/core/mm/ |
| H A D | boot_mem.c | 96 DMSG("%#"PRIxVA" len %#zx", pad->start, pad->len); in add_padding() 268 DMSG("consumed %p %#"PRIxVA" len %#zx", in boot_mem_foreach_padding() 272 DMSG("keeping %p %#"PRIxVA" len %#zx", in boot_mem_foreach_padding() 294 DMSG("Allocated %zu bytes at va %#"PRIxVA" pa %#"PRIxPA, in boot_mem_release_unused() 298 DMSG("Tempalloc %zu bytes at va %#"PRIxVA, in boot_mem_release_unused() 320 DMSG("Carving out %#"PRIxPA"..%#"PRIxPA, pa, pa + n - 1); in boot_mem_release_unused() 329 DMSG("Releasing %zu bytes from va %#"PRIxVA, n, va); in boot_mem_release_unused() 354 DMSG("Releasing %zu bytes from va %#"PRIxVA, n, va); in boot_mem_release_tmp_alloc() 370 DMSG("Releasing %zu bytes from va %#"PRIxVA, n, va); in boot_mem_release_tmp_alloc()
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